EP80579 Datasheet, PDF (1020/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 26-48. Offset 64h: PORTSC - Port N Status and Control Register (Sheet 5 of 5)
Description: Port 1 64 - 67h, Port 2 68 - 6Bh
View: PCI
BAR: MBAR
Bus:Device:Function: 0:29:7
Offset Start: 64h
Offset End: 67h
View: PCI
BAR: MBAR
Bus:Device:Function: 0:29:7
Offset Start: 68h
Offset End: 6Bh
Size: 32 bit
Default: 00003000h
Power Well: Suspend
Bit Range
04
03
02
Bit
Acronym
Bit Description
Sticky
OCA
PEDC
PENDIS
Overcurrent Active:
0 = This port does not have an overcurrent condition
(deafult).
1 = This port currently has an overcurrent condition.
This bit will automatically transition from a one to a zero
when the overcurrent condition is removed. The functionality
of this bit is not dependent upon the port owner.
CMI automatically disables the port when the overcurrent
active bit is ‘1’.
Port Enable/Disable Change:
0 = No change (default).
1 = Port enabled/disabled status has changed.
For the root hub, this bit gets set to a one only when a port is
disabled due to the appropriate conditions existing at the
EOF2 point (See Chapter 11 of the USB Specification for the
definition of a port error). This bit is not set due to the
Disabled-to-Enabled transition, nor due to a disconnect.
Software clears this bit by writing a 1 to it.
Port Enabled/Disabled:
0 = Disable (default).
1 = Enable.
As described in the EHCI Specification, ports are enabled by
the host controller as a part of the reset and enable. Software
cannot enable a port by writing a one to this field. The host
controller will only set this bit to a one when the reset
sequence determines that the attached device is a high-
speed device.
Bit Reset
Value
0h
0h
0h
Bit Access
RO
RWC
RW
Connect Status Change:
0 = No change (default).
1 = Change in Current Connect Status.
Indicates a change has occurred in the port’s Current Connect
01
CSC
Status. The host controller sets this bit for all changes to the
port device connect status, even if system software has not
cleared an existing connect status change. For example, the
insertion status changes twice before system software has
cleared the changed condition, hub hardware will be “setting”
an already-set bit (i.e., the bit will remain set). Software sets
this bit to 0 by writing a 1 to it.
Current Connect Status:
0 = No device is present (default).
00
CCS
1 = Device is present on port.
This value reflects the current state of the port and may not
correspond directly to the event that caused the Connect
Status Change bit (Bit 1) to be set.
0h
RWC
0h
RO
Intel^® EP80579 Integrated Processor Product Line Datasheet
1020
August 2009
Order Number: 320066-003US