EP80579 Datasheet, PDF (1272/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
35.8.1.15 Offset E0h: PMCS – Power Management Control and Status Register
For an overview of the power management capability of AIOC devices, see Section
35.5, “Power Management of AIOC Devices”.
Table 35-58. Offset E0h: PMCS: Power Management Control and Status Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: M:3:0
Offset Start: E0h
Offset End: E1h
Size: 16 bit
Default: 0000h
Power Well: Core
Bit Range Bit Acronym
15
14 : 13
12 : 09
08
07 : 04
03
02
01 : 00
PME_STATUS PME Status -
DATA_SCALE Data Scale
DATA_SEL Data Select
PME_EN PME Enable -
Reserved Reserved
NSR
No Soft Reset
Reserved Reserved
PS
Power State
Bit Description
Sticky
Bit Reset
Value
0h
00b
0000b
0h
0000b
0h
0h
00b
Bit Access
RO
RO
RO
RO
RO
RO
RO
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
1272
August 2009
Order Number: 320066-003US