EP80579 Datasheet, PDF (651/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.6
Memory Mapped I/O for EDMA Registers
The EDMA is a reuse module capable of 64-bit addressing on both source and
destination interfaces.
For the EP80579 the EDMA will only be used in 32-bit addressing mode
This section describes the memory-mapped registers for the EDMA Controller. The
EDMALBAR register, described in Section 16.3.1.9, “Offset 10h: EDMALBAR - EDMA Low
Base Address Register”, provides the base address for these registers. The offsets
listed for the following registers are relative to this base address.
The BAR value for all registers in this section is BAR10h.
Each DMA channel consists of twelve 32-bit registers contiguous in memory mapped
address space. The first of the four sets is described in detail, the others are copies at
different offsets for the other channels. The abbreviations for the other channel register
names replace the 0 at the end of the name with the appropriate channel number 1, 2,
or 3.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
651