EP80579 Datasheet, PDF (77/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Contents
35-34
35-35
35-36
35-37
35-38
35-39
35-40
35-41
35-42
35-43
35-44
35-45
35-46
35-47
35-48
35-49
35-50
35-51
35-52
35-53
35-54
35-55
35-56
35-57
35-58
35-59
35-60
35-61
35-62
35-63
35-64
35-65
35-66
35-67
35-68
35-69
35-70
35-71
35-72
35-73
35-74
35-75
35-76
35-77
35-78
35-79
35-80
35-81
35-82
35-83
35-84
35-85
35-86
Offset F2h: MCTL: Message Signalled Interrupt Control Register ..........................1259
Offset F4h: MADR: Message Signalled Interrupt Address Register ........................1259
Offset F8h: MDATA: Message Signalled Interrupt Data Register ...........................1260
Bus M, Device 0, Function 0: Gigabit Ethernet MAC I/O Spaces Registers................1262
Bus M, Device 1, Function 0: Gigabit Ethernet MAC I/O Spaces Registers................1262
Bus M, Device 2, Function 0: Gigabit Ethernet MAC I/O Spaces Registers................1262
Gigabit Ethernet MAC I/O IOBAR Register Summary ............................................1262
Offset 0000h: IOADDR - IOADDR Register ........................................................1263
Offset 0004h: IODATA - IODATA Register .........................................................1264
Bus M, Device 3, Function 0: Summary of GCU PCI Configuration Registers ............1265
Offset 00h: VID: Vendor Identification Register .................................................1265
Offset 02h: DID: Device Identification Register .................................................1266
Offset 04h: PCICMD: Device Command Register ................................................1266
Offset 06h: PCISTS: PCI Device Status Register ................................................1267
Offset 08h: RID: Revision ID Register ..............................................................1268
Offset 09h: CC: Class Code Register ................................................................1268
Offset 0Eh: HDR: Header Type Register ............................................................1268
Offset 10h: CSRBAR: Control and Status Registers Base Address Register .............1269
Offset 2Ch: SVID: Subsystem Vendor ID Register ..............................................1269
Offset 2Eh: SID: Subsystem ID Register ...........................................................1270
Offset 34h: CP: Capabilities Pointer Register .....................................................1270
Offset DCh: PCID: Power Management Capability ID Register ..............................1270
Offset DDh: PCP: Power Management Next Capability Pointer Register .................1271
Offset DEh: PMCAP: Power Management Capability Register ................................1271
Offset E0h: PMCS: Power Management Control and Status Register .....................1272
Bus M, Device 4, Function 0: Summary of CAN Interface PCI
Configuration Registers ....................................................................................1273
Bus M, Devices 5, Function 0: Summary of CAN Interface PCI
Configuration Registers ....................................................................................1274
Offset 00h: VID: Vendor Identification Register .................................................1275
Offset 02h: DID: Device Identification Register .................................................1275
Offset 02h: DID: Device Identification Register .................................................1276
Offset 04h: PCICMD: Device Command Register ................................................1276
Offset 06h: PCISTS: PCI Device Status Register ................................................1277
Offset 08h: RID: Revision ID Register ..............................................................1278
Offset 09h: CC: Class Code Register ................................................................1278
Offset 0Eh: HDR: Header Type Register ............................................................1279
Offset 10h: CSRBAR: Control and Status Registers Base Address Register .............1279
Offset 2Ch: SVID: Subsystem Vendor ID Register ..............................................1280
Offset 2Eh: SID: Subsystem ID Register ...........................................................1280
Offset 34h: CP: Capabilities Pointer Register .....................................................1281
Offset 3Ch: IRQL: Interrupt Line Register .........................................................1281
Offset 3Dh: IRQP: Interrupt Pin Register ..........................................................1282
Offset 40h: CANCTL - CAN Control Register .......................................................1282
Offset DCh: PCID: Power Management Capability ID Register ..............................1283
Offset DDh: PCP: Power Management Next Capability Pointer Register .................1283
Offset DEh: PMCAP: Power Management Capability Register ................................1284
Offset E0h: PMCS: Power Management Control and Status Register .....................1284
Offset E4h: SCID: Signal Target Capability ID Register .......................................1285
Offset E5h: SCP: Signal Target Next Capability Pointer Register ...........................1285
Offset E6h: SBC: Signal Target Byte Count Register ...........................................1286
Offset E7h: STYP: Signal Target Capability Type Register ....................................1286
Offset E8h: SMIA: Signal Target IA Mask Register ..............................................1287
Offset ECh: SINT: Signal Target Raw Interrupt Register .......................................1287
Offset F0h: MCID: Message Signalled Interrupt Capability ID Register ..................1288
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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