EP80579 Datasheet, PDF (566/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 16-191.Offset 78h: PEASLTCAP - PCI Express Slot Capabilities Register (Sheet 2 of
2)
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:2:0
Offset Start: 78h
Offset End: 7Bh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Hot Plug is not supported
06
HOTPC
BIOSmust set to 0.
Sticky
Bit Reset
Value
Bit Access
0b
RWO
05
HOTPS
Hot Plug Surprise: Not supported. .
04
PIP
Hot Plug not supported. BIOSmust set to 0
03
AIP
Hot Plug not supported. BIOSmust set to 0
02
MSP
Hot Plug not supported. BIOSmust set to 0
01
PCP
Hot Plug not supported. BIOSmust set to 0
00
ABP
Hot Plug not supported. BIOSmust set to 0
0b
RO
0b
RWO
0b
RWO
0b
RWO
0b
RWO
0b
RWO
16.4.1.53 Offset 78h: PEA1SLTCAP - PCI Express* Slot Capabilities Register
This register identifies PCI Express* slot specific capabilities.
Note:
Hot Plug is not supported.
Table 16-192.Offset 78h: PEA1SLTCAP - PCI Express Slot Capabilities Register (Sheet 1 of
2)
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:3:0
Offset Start: 78h
Offset End: 7Bh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31 : 19
18 : 17
16 : 15
Bit Acronym
Bit Description
Sticky
PSN
Reserved
SPLS
Physical Slot Number: This hardware initialized field
indicates the physical slot number attached to this port.
This field must be hardware initialized to a value that
assigns a slot number that is globally unique within the
chassis. This field must be initialized to 0 for ports
connected to devices that are integrated on the
motherboard.
Reserved
Slot Power Limit Scale Specifies the scale used for the
Slot Power Limit Value.
00b = 1.0X (25.5–255)
01b = 0.1X (2.55–25.5)
10b = 0.01X (0.255–2.55)
11b = 0.001X (0.0–0.255)
Bit Reset
Value
000h
00b
00b
Bit Access
RWO
RWO
Intel^® EP80579 Integrated Processor Product Line Datasheet
566
August 2009
Order Number: 320066-003US