EP80579 Datasheet, PDF (1599/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 39-16. Offset 000000A0h: RxMessageControl[0-15] - Receive Message Command and
Control (Sheet 2 of 2)
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:4:0
000000A0h
Offset Start: at 20h
Offset End: 000000A3h
at 20h
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:5:0
000000A0h
Offset Start: at 20h
Offset End: 000000A3h
at 20h
Size: 32 bit
Default: XXXXXXXXh
Power Well: Core
Bit Range
02
01
00
Bit Acronym
Bit Description
Sticky
RTRabort
RTR Abort request
‘0’: Idle
‘1’: Request removal of a pending RTR message reply. The
flag is cleared when the message was removed or when
the message won arbitration. The TxReq flag is released at
the same time
Reply Pending
RTRreply_pendi
ng
‘0’:
No
RTR
reply
request
pending
‘1’: RTR reply request pending
MsgAv
Message Available
Read:
‘0’: No new message available
1’: New message available
Write:
‘0’: idle
‘1’: Acknowledges receipt of new message. Acknowledging
a message clears the MsgAv flag. Before acknowledging
receipt of a new message, the message content must be
copied into system memory. Acknowledging a message
clears the MsgAv flag.
Bit Reset
Value
Xh
Xh
Xh
Bit Access
RW
RW
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1599