EP80579 Datasheet, PDF (1908/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 49-109.JTAG Timing Specifications (Sheet 2 of 2)
Symbol
Parameter
Conditions
Min
Max
Units Figures
T_TCR
TCK Rise Time
0.3V to 0.72V
5
T_TCF
TCK Fall Time
0.72V to 0.3V
5
T_TIS1
Input Setup to TCK-
-TDI, TMS
3.0
ns
-
ns
-
ns
49-50
T_TIH1
Input Hold from
TCK--TDI, TMS
2.0
ns
49-50
T_TOV1
TDO Output Valid
Delay
Relative to
falling edge of
TCK
4.25
13.25
ns
49-49
T_OF1
TDO Float Delay
Relative to
falling edge of
TCK
4.25
13.25
ns
49-49
Notes:
1.
1.2V I/O buffers
2.
These values are typical values seen by the manufacturing process and are not tested
3.
For TMS, TDI and TRST#.
4.
TCK input threshold voltage.
5.
Guaranteed by design.
Notes
1, 5
1, 5
3
3
2, 5
4, 5
49.5.23.3.1 JTAG Timing Diagrams and Test Conditions
Figure 49-49.JTAG Output Timing Measurement Waveforms
Vm
CLK
Vlest
Vt
TOV1
OUTPUT
DELAY FALL
OUTPUT
DELAY RISE
VTall
TOV1
Vrise
TOF
OUTPUT FLOAT
B6432-01
Intel^® EP80579 Integrated Processor Product Line Datasheet
1908
August 2009
Order Number: 320066-003US