EP80579 Datasheet, PDF (943/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 25-3. PCICMD - Command Register (Sheet 2 of 2)
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:29:0
Offset Start: 04h
Offset End: 05h
Size: 16 bit
Default: 0000h
Power Well: Core
Bit Range
02
01
00
Bit Acronym
Bit Description
Sticky
BME
MSE
IOSE
Bus Master Enable:
0 = Disable.
1 = Enable. Can generate cycles to main memory as a
master for USB transfers.
Memory Space Enable: Hardwired to‘0’.
I/O Space Enable: This bit controls access to the I/O
space registers.
0 = Disable: Accesses to the USB I/O registers is
Disabled.
1 = Accesses to the USB I/O registers is enabled. The
Base Address register for USB must be programmed
before this bit is set.
Bit Reset
Value
0h
0h
0h
Bit Access
RW
RW
25.1.1.3 PCISTS - Device Status Register
Table 25-4. PCISTS - Device Status Register (Sheet 1 of 2)
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:29:0
Offset Start: 06h
Offset End: 07h
Size: 16 bit
Default: 0280h
Power Well: Core
Bit Range
15
14
13
12
11
Bit Acronym
Bit Description
Sticky
DPE
SSE
RMA
Reserved
STA
Detected Parity Error:
0 = No parity error detected.
1 = Set when a data parity error is detected on writes to
the UHCI register space or on read completions
returned to the host controller.
Note: Software sets this bit to 0 by writing a 1 to this bit
location.
Reserved
Received Master-Abort Status:
0 = No master abort generated by USB.
1 = USB as a master, receives a master abort.
Note: Software sets this bit to 0 by writing a 1 to this bit
location.
Reserved
Signaled Target-Abort Status:
0 = Did not terminate a transaction to a USB function with
a target abort.
1 = USB function is targeted with a transaction that
terminates with a target abort.
Note: Software sets this bit to 0 by writing a 1 to this bit
location.
Bit Reset
Value
0h
0h
0h
0h
0h
Bit Access
RWC
RWC
RWC
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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