EP80579 Datasheet, PDF (739/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 19-10. Offset 40h: ABASE: ACPI Base Address Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:31:0
Offset Start: 40h
Offset End: 43h
Size: 32bit
Default: 00000001h
Power Well: Core
Bit Range
31 :16
15 :07
06 :01
00
Bit Acronym
Bit Description
Sticky
Reserved
BSA
Reserved
RTE
Reserved.
Base Address: This field provides the 128 bytes of I/O
space for ACPI and TCO logic. This is placed on a 128 byte
boundary.
Reserved.
Resource Type Indicator: Hardwired 1 to indicate I/O
space.
Bit Reset
Value
0000h
00h
00h
1
Bit Access
RW
RO
19.2.2.2 Offset 44h: ACT: ACPI Control Register
Table 19-11. Offset 44h: ACTL: ACPI Control Register (Sheet 1 of 2)
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:31:0
Offset Start: 44h
Offset End: 47h
Size: 8 bit
Default: 00h
Power Well: Core
Bit Range
07
06 :03
Bit Acronym
Bit Description
Sticky
EN
Reserved
ACPI Enable:
0 = Disable. Decoding of the I/O range pointed to by the
ACPI base register is disabled, and the ACPI power
management function is enabled.
1 = Decoding of the I/O range pointed to by the ACPI base
register is enabled, and the ACPI power management
function is enabled.
Note: The APM power management ranges (B2/B3h)
are always enabled and are not affected by this
bit.
Reserved
Bit Reset
Value
0h
0000h
Bit Access
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
739