EP80579 Datasheet, PDF (1894/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
49.5.14.4.2 TDM Transmit and Receive Timing Diagrams
Figure 49-43.TDM, Serial Timings
As Inputs:
TX_CLK/RX_CLK
(TX or RX) FRAME
(Positive edge)
(TX or RX) FRAME
(Negative edge)
RX_DATA
(Positive edge)
RX_DATA
(Negative edge)
T2
T9
T1
T3
T4
Valid Data
Valid Data
As Outputs:
T5
T6
T7
T8
(TX or RX) FRAME
(Positive edge)
(TX or RX) FRAME
(Negative edge)
TX_DATA
(Positive edge)
TX_DATA
(Negative edge)
Valid Data
Valid Data
B6431-01
49.5.15 Local Expansion Bus (LEB)
The Local Expansion bus is a 16-bit 33-80MHz bus with 8 programmable chip selects.
This section describes the electrical characteristics of the LEB interface.
49.5.15.1 LEB Signal List
For Local Expansion Bus pin descriptions, refer to Table 48-24, “Expansion Bus Signals”
on page 1765.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1894
August 2009
Order Number: 320066-003US