EP80579 Datasheet, PDF (1117/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 30-2. Interrupt Options - APIC Mode
33
N/A
GPIO[33]
N/A
External GPIO driven interrupt
34
N/A
GPIO[34]
N/A
External GPIO driven interrupt
35
N/A
GPIO[40]
N/A
External GPIO driven interrupt
36
N/A
GPIO[18]
N/A
External GPIO driven interrupt
37
N/A
GPIO[19]
N/A
External GPIO driven interrupt
38
N/A
GPIO[25]
N/A
External GPIO driven interrupt
39
N/A
GPIO[27]
N/A
External GPIO driven interrupt
Notes:
1.
If an interrupt is used for PCI IRQ[A:H], SCI, or TCO, it must not be used for ISA (legacy)-style
interrupts (via SERIRQ).
2.
PIRQ[A-D]do not come out on the pins any longer.
3.
In APIC mode, the PCI interrupts A:H are mapped to IRQ[16:23].
4.
When programming the polarity of internal interrupt sources on the APIC, interrupts 0 through 15
receive active-high internal interrupt sources; interrupts 16 through 23 receive active-low internal
interrupt sources.
5.
IRQ24-39 are externally driven interrupts through GPIO pins, enabled if GPIO_IRQ_STRAP_STS field
of Extended Test Mode Register3 (ETR3) is set to 1 (set by externally pulling strap siu2_txd_ad18 to
LOW on the rising edge of PWROK) and if each of the 16 IRQ capable GPIO pins is configured to work
in alternative mode (in GPIO_USE_SEL1/GPIO_USE_SEL2 registers).
Table 30-3. Signals Associated with Interrupt Logic
Signal Name
S3
S5
SERIRQ
Off
Off
PIRQ[A:H]#
Off
Off
30.2
8259 Interrupt Controllers (PIC)
30.2.1
Overview
The IICH incorporates the functionality of two 8259 interrupt controllers that provide
system interrupts for the legacy (ISA) compatible interrupt controller (PIC). These
interrupts are: system timer, keyboard controller, serial ports, parallel ports, floppy
disk, mouse, and DMA channels. In addition, this interrupt controller can support the
PCI based interrupts by mapping the PCI interrupt onto the compatible IRQ interrupt
line. Each 8259 core supports eight interrupts, numbered 0–7. Table 30-4 shows how
the cores are connected.
Table 30-4. 8259 Core Connection (Sheet 1 of 2)
8259
Master
8259 Input
0
1
2
3
4
5
6
7
Typical Interrupt Source
Connected Pin / Function
Internal
Keyboard
Internal
Serial Port A
Serial Port B
Parallel Port / Generic
Floppy Disk
Parallel Port / Generic
Internal Timer / Counter 0 output or Multimedia
Timer 0
IRQ1 via SERIRQ
Slave Controller INTR output
IRQ3 via SERIRQ, PIRQx
IRQ4 via SERIRQ, PIRQx
IRQ5 via SERIRQ, PIRQx
IRQ6 via SERIRQ, PIRQx
IRQ7 via SERIRQ, PIRQx
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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