EP80579 Datasheet, PDF (115/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Figure 3-2. Logical Overview of the CMI PCI Infrastructure
PCI Bus 0
IA
Table 3-2 summarizes the address space requirements (both in memory and I/O space)
of the IMCH and IICH.
Table 3-2.
Basic CMI Platform Address Space Requirements for IMCH and IICH Devices
PCI
Unit
Dev. Fn.
Block
Mem,
I/O
0
0
Northbridge
Mem
1
DRAM, Error Handling
N/A
1
0
EDMA
Mem
2
0
PCI-Express (HSI A0)
×8 or ×4
N/A
3
0
PCI-Express (HSI A1)
×4
N/A
0
29
7
USB 1.1
USB 2.0
I/O
Mem
Size
Register
4KB
N/A
4KB
SMRBASE (see Section 16.1.1.9, “Offset
14h: SMRBASE - System Memory RCOMP
Base Address Register”)
EDMALBAR (see Section 16.3.1.9, “Offset
10h: EDMALBAR - EDMA Low Base
Address Register”
N/A
N/A
32B
1KB
USBIOBAR (see Section 25.1.1.9,
“USBIOBAR - Base Address Register”)
MBAR (see Section 26.2.1.10, “Offset 10h:
MBAR - Memory Base Address Register”)
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
115