EP80579 Datasheet, PDF (1632/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Figure 41-5. Time Stamp Reference Point
Preamble
Octet
Message Timestamp
Point
Ethernet
Start of Frame
Delimiter
First Octet
following
Start of Frame
1
1
1
1
1
111
0
0
0
0
0
0
0000000
bit time
41.5.3.2
PTP Message Detection in Ethernet Frames
IEEE1588 PTP messages may be detected within three types of ethernet frames.
• L4 UDP frames where the port is of the type “EventPort”
• L2 Ethernet frames where the EtherType is defined to be “IEEE1588”
• A user defined frame in which configurable offsets, masks and compare values can
be defined by the user via registers. This mode is provided to facilitate usage with a
custom or otherwise non-IEEE1588 compliant system.
The specific decoding to identify a PTP containing frame is shown in Table 41-7.
Table 41-7. PTP Frame Identification
Field
Dest MAC Address
Source MAC Address
EtherType
VLAN tag control
(only present if
EtherType = 0x8100)
EtherType
(only present in
tagged frame)
Field
Size
6
6
2
L4
L2
Ethernet Header
x
x
x
x
0x0800
--- OR ---
0x8100 (indicates
tagged frame)
Programmable value
(default = 0x88f7
IEEE1588)
--- OR ---
0x8100 for tagged
frame
VLAN Header
2
Ignore if present
Ignore if present
2
If tagged frame then
test against
programmed value
(default = 0x88f7)
IP Header
User Defined
x
x
Programmable mask
and value
Not Present
Intel^® EP80579 Integrated Processor Product Line Datasheet
1632
August 2009
Order Number: 320066-003US