EP80579 Datasheet, PDF (674/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.6.1.40 Offset CCh: CDUAR3 - Channel 3 Current Descriptor Upper Address
Register
Table 16-336.Offset CCh: CDUAR3 - Channel 3 Current Descriptor Upper Address Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: CCh
Offset End: CFh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
Bit Reset
Value
The bit descriptions for this register are identical to those for CDUAR0 described in Section 16.6.1.4.
Bit Access
16.6.1.41 Offset D0h: SAR3 - Channel 3 Source Address Register
Table 16-337.Offset D0h: SAR3 - Channel 3 Source Address Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: D0h
Offset End: D3h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
The bit descriptions for this register are identical to those for SAR0 described in Section 16.6.1.5.
Bit Reset
Value
Bit Access
16.6.1.42 Offset D4h: SUAR3 - Channel 3 Source Upper Address Register
Table 16-338.Offset D4h: SUAR3 - Channel 3 Source Upper Address Register
Description:
View: PCI
BAR: EDMALBAR
Bus:Device:Function: 0:1:0
Offset Start: D4h
Offset End: D7h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
Sticky
Bit Reset
Value
The bit descriptions for this register are identical to those for SUAR0 described in Section 16.6.1.6.
Bit Access
Intel^® EP80579 Integrated Processor Product Line Datasheet
674
August 2009
Order Number: 320066-003US