EP80579 Datasheet, PDF (44/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Contents
39.4.3 Frame Types ........................................................................................ 1572
39.4.3.1 Data Frame .................................................................................. 1572
39.4.3.2 Remote Frame .............................................................................. 1575
39.4.3.3 Error Frames ................................................................................ 1576
39.4.3.4 Overload Frames........................................................................... 1577
39.4.4 CAN Bit Timing..................................................................................... 1577
39.4.4.1 Introduction ................................................................................. 1577
39.4.4.2 Setting Proper Bit Rate, tseg1 and tseg2 .......................................... 1579
39.5 Theory of Operation ....................................................................................... 1580
39.5.1 Modes of Operation............................................................................... 1580
39.5.2 Error Handling...................................................................................... 1580
39.5.3 Send/Receive Procedure ........................................................................ 1581
39.5.3.1 Send Procedure ............................................................................ 1581
39.5.3.2 Receive Procedures ....................................................................... 1581
39.5.3.3 Rx Message Processing .................................................................. 1582
39.5.3.4 Acceptance Filter........................................................................... 1582
39.5.3.5 RTR Auto-Reply............................................................................. 1583
39.5.3.6 RxBuffer Linking............................................................................ 1583
39.5.4 TxMessage Registers............................................................................. 1584
39.6 Register Summary ......................................................................................... 1585
39.6.1 Detailed Register Descriptions ................................................................ 1587
39.6.1.1 Offset 00000000h: Int_status - Interrupt Status Register .................. 1587
39.6.1.2 Offset 00000004h: Int_Ebl - Interrupt Enable Register ...................... 1588
39.6.1.3 Offset 00000008h: Buffer Status - Buffer Status Indicators................. 1589
39.6.1.4 Offset 0000000Ch: ErrorStatus - Error Status Indicators .................... 1590
39.6.1.5 Offset 00000010h: Command - Operating Modes............................... 1591
39.6.1.6 Offset 00000014h: Config - CAN Configuration Register ..................... 1592
39.6.1.7 Offset 00000020h: TxMessageControl[0-7] - Transmit Message Control and
Command .................................................................................... 1593
39.6.1.8 Offset 00000024h: TxMessageID[0-7] - Transmit Message ID ............. 1595
39.6.1.9 Offset 00000028h: TxMessageDataHigh[0-7] - Transmit Message Data High
1596
39.6.1.10 Offset 0000002Ch: TxMessageDataLow[0-7] - Transmit Message Data Low..
1597
39.6.1.11 Offset 000000A0h: RxMessageControl[0-15] - Receive Message Command
and Control .................................................................................. 1598
39.6.1.12 Offset 000000A4h: RxMessageID[0-15] - Receive Message ID............. 1600
39.6.1.13 Offset 000000A8h: RxMessageDataHigh[0-15] - Receive Message Data High
1600
39.6.1.14 Offset 000000ACh: RxMessageDataLow[0-15] - Receive Message Data Low .
1601
39.6.1.15 Offset 000000B0h: RxMessageAMR[0-15] - Receive Message AMR ....... 1601
39.6.1.16 Offset 000000B4h: RxMessageACR[0-15] - Receive Message ACR........ 1602
39.6.1.17 Offset 000000B8h: RxMessageAMR_Data[0-15] - Receive Message AMR Data
1603
39.6.1.18 Offset 000000BCh: RxMessageACR_Data[0-15] - Receive Message ACR Data
1603
40.0 SSP Serial Port..................................................................................................... 1605
40.1 Overview ...................................................................................................... 1605
40.2 Feature List .................................................................................................. 1605
40.3 Theory of Operation ....................................................................................... 1605
40.3.1 Endianness .......................................................................................... 1605
40.3.2 Error Handling...................................................................................... 1605
40.4 Register Summary ......................................................................................... 1606
40.4.1 SSP Control Register 0 .......................................................................... 1607
40.4.1.1 Offset 00h: SSCR0 - SSP Control Register 0 Details ........................... 1607
40.4.1.2 Data Size Select (DSS) .................................................................. 1609
Intel^® EP80579 Integrated Processor Product Line Datasheet
44
August 2009
Order Number: 320066-003US