EP80579 Datasheet, PDF (1891/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
The GbE RCOMP controller starts operation when the GBE_AUX_PWR_GOOD input is
asserted. This condition indicates the power supplies are stable; the condition also
indicates that the GBE_REFCLK input is being driven with a 125Mhz clock. The
GBE_REFCLK input is divided by either 4 or 16 and then used to drive the RCOMP state
machine. Software accessible registers that provide options to monitor/overwrite
internal bias and comparator output are also present.
49.5.13.6 Voltage Domains
The GbE ports and associated miscellaneous I/Os (MDIO, EE, REFCLK, PME_WAKE, and
RCOMP) are powered with 2.5V power supply. A secondary low current 3.3V power
supply is also required to allow 3.3V input level tolerance. The GbE IO interface
supports “wake-on-LAN” operation and therefore some of the I/O signals are powered
with sustain power supplies that are always powered on while other I/O signals are
powered with “core” power supplies that are only active when the remainder of the chip
is powered on. GbE port 0 and the miscellaneous MDIO, EE, REFCLK, PME_WAKE, and
RCMP IOs are powered through the sustain power supply VCCSUS25, and the 3.3V
VCCGBEPSUS for 3.3V input tolerance. GbE ports 1 and 2 are powered with the VCC25
power supply and the VCCGBE33 is connected for 3.3V input level tolerance. The user
may consider connecting VCCGBEPSUS power supply pins to the VCCPSUS power
supply and connecting VCCGBE33 to the VCC33 power supply on the PCB in order to
reduce the number of regulators used in the system. VCC25 and VCCSUS25 are only
used in the GbE IO interface section of the chip.
49.5.14
Time Division Multiplex (TDM)
This section describes the electrical characteristics of the TDM interface.
49.5.14.1 TDM Signal List
For TDM pin descriptions, refer to Table 48-23, “TDM Interface Signals,” on page 1764.
49.5.14.2 TDM DC Characteristics
Table 49-83. TDM DC Input Characteristics
Symbol
Parameter
Conditions
Min Typical Max
Units
Notes
V_IH
Input voltage high
-
2.0
-
V
-
V_IL
Input voltage low
-
-
-
0.8
V
-
Ι_OL
Output current at
low voltage
V_OL<0.8
-
-
4
mA
-
Ι_leak
Input Leakage
Current
0<V_IN<Vcc3_3
-
-
10
µA
-
Cin
Input pin cap
-
-
-
5
pf
1
Notes:
1.
Guaranteed by design. These values are typical values seen for this process, but not measured during
production testing.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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