EP80579 Datasheet, PDF (1526/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 37-116.TORL: Total Octets Received Low Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 40C0h
Offset End: 40C3h
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 40C0h
Offset End: 40C3h
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 40C0h
Offset End: 40C3h
Size: 32 bits
Default: 00000000h
Power
Well:
GbE0: Aux
Gbe1/2: Core
Bit Range Bit Acronym
Bit Description
31 : 00
TORL
Number of total octets received - lower 4 bytes
Sticky
Bit Reset
Value
0h
Bit Access
RC
37.6.6.39 TORH – Total Octets Received High Register
This is the high 32b of a register that counts the total number of octets received,
including octets from both good and bad packets. Packets must first pass the MAC
address filtering (Broadcast or Individual-Address/Multicast match) - packets not for
this MAC are not included. Octets will be counted for all packets regardless of their
length, whether they encountered errors, whether they are detected as regular packets
or flow control packets, and regardless of whether they are stored successfully versus
dropped from a Receive FIFO (Receive Packet Buffer). Bytes from the <Destination
Address> field through the <CRC> field (inclusively) are counted. {TORH,TORL}
together make up a logical 64-bit register. Each half must be accessed independently
using separate 32-bit accesses. Both registers are reset when the upper 32-bit value
(TORH) is read. The register sticks at 0xFFFF_FFFF_FFFF_FFFF.
Table 37-117.TORH: Total Octets Received High Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 40C4h
Offset End: 40C7h
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 40C4h
Offset End: 40C7h
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 40C4h
Offset End: 40C7h
Size: 32 bits
Default: 00000000h
Power
Well:
GbE0: Aux
Gbe1/2: Core
Bit Range Bit Acronym
Bit Description
31 : 00
TORH
Number of total octets received - upper 4 bytes
Sticky
Bit Reset
Value
0h
Bit Access
RC
Intel^® EP80579 Integrated Processor Product Line Datasheet
1526
August 2009
Order Number: 320066-003US