EP80579 Datasheet, PDF (1541/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 37-139.IPV6_ADDR0BYTES_13_16 – IPv6 Address Table Register, Bytes 13 - 16
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 588Ch
Offset End: 588Fh
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 588Ch
Offset End: 588Fh
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 588Ch
Offset End: 588Fh
Size: 32 bits
Default: XXXXXXXXh
Power
Well:
GbE0: Aux
Gbe1/2: Core
Bit Range Bit Acronym
Bit Description
31 : 00
IPV6DDR3 IPV6 Address, bytes 13 - 16
Sticky
Bit Reset
Value
X
Bit Access
RW
Note:
This table is loaded from the EEPROM if the IP Address Valid field of the EEPROM's
Management Control word is 1 and the IP Address Type field is 1(IPv6). Otherwise, the
value of this table is undefined after reset.
37.6.7.10 FFLT[0-3] – Flexible Filter Length Table Registers (0x5F00 - 0x5F18;
RW)
The Flexible Filter Length Table stores the minimum packet lengths required to pass
each of the Flexible Filters. Any packets that are shorter than the programmed length
won't pass that filter. Each Flexible Filter will consider a packet that doesn't have any
mismatches up to that point to have passed the Flexible Filter when it reaches the
required length. It will not check any bytes past that point:
• Address 0x5F00: FFLT_LEN0
• Address 0x5F04: Reserved
• Address 0x5F08: FFLT_LEN1
• Address 0x5F0C: Reserved
• Address 0x5F10 FFLT_LEN2
• Address 0x5F14: Reserved
• Address 0x5F18: FFLT_LEN3
• Address 0x5F1C: Reserved
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1541