EP80579 Datasheet, PDF (1476/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 37-50. RCTL: Receive Control Register (Sheet 3 of 4)
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 0100h
Offset End: 0103h
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 0100h
Offset End: 0103h
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 0100h
Offset End: 0103h
Size: 32 bits
Default: 00000000h
GbE0: Aux
Power Well: Gbe1/2:
Core
Bit Range
17 : 16
15
14
13 : 12
11 : 10
09 : 08
Bit Acronym
Bit Description
Sticky
BSIZE
BAM
Rsvd
MO
Rsvd
RDMTS
Receive Buffer Size. Combined with RCTL.BSEX to
program the receive buffer size. Control of receive buffer
size permits software to trade-off descriptor performance
versus required storage space. Buffers that are 2048 bytes
require only one descriptor per receive packet maximizing
descriptor efficiency. Buffers that are 256 bytes maximize
memory efficiency at a cost of multiple descriptors for
packets longer than 256 bytes.
RCTL.BSEX = 0 / RCTL.BSIZE = 00 -> Receive Buffer Size
= 2048B
RCTL.BSEX = 0 / RCTL.BSIZE = 01 -> Receive Buffer Size
= 1024B
RCTL.BSEX = 0 / RCTL.BSIZE = 10 -> Receive Buffer Size
= 512B
RCTL.BSEX = 0 / RCTL.BSIZE = 11 -> Receive Buffer Size
= 256B
RCTL.BSEX = 1 / RCTL.BSIZE = 00 -> Reserved
RCTL.BSEX = 1 / RCTL.BSIZE = 01 -> Receive Buffer Size
= 16384B
RCTL.BSEX = 1 / RCTL.BSIZE = 10 -> Receive Buffer Size
= 8192B
RCTL.BSEX = 1 / RCTL.BSIZE = 11 -> Receive Buffer Size
= 4096B
Broadcast Accept Mode.
0 = Ignore broadcast (unless it matches exact or
imperfect filters)
1 = Accept broadcast packets
Reserved
Multicast Offset. This determines which bits of the
incoming multicast address are used in looking up the bit
vector.
• 00 = [47:36]
• 01 = [46:35]
• 10 = [45:34]
• 11 = [43:32]
Reserved
Receive Descriptor Minimum Threshold Size. These
bits determines the threshold value for free receive
descriptors. The corresponding interrupt is set whenever
the fractional number of free descriptors becomes equal to
RCTL.RDMTS. Refer to “RDLEN – Receive Descriptor Length
Register” on page 1481 for further information.
• 00 = 1/2
• 01 = 1/4
• 10 = 1/8
• 11 = Reserved
Bit Reset
Value
00h
0h
0h
0h
0h
00h
Bit Access
RW
RW
RV
RW
RV
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
1476
August 2009
Order Number: 320066-003US