EP80579 Datasheet, PDF (1413/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
37.5.11.3 Signature Field
The only way the MAC has to tell if an EEPROM is present is by trying to read the
EEPROM. The MAC will first read the Initialization Control Word 1. It will check the
received value for bits 15 and 14. If bit 15 is 0 and bit 14 is 1, it considers the EEPROM
to be present and valid and will read additional EEPROM words and program its internal
registers based on the values read. Otherwise, it will ignore the values it read from the
Initialization Control Word 1 and not read any other words.
37.5.11.4 EEPROM Map
Note:
If any one of the GbE interfaces is disabled then the corresponding memory locations in
the EEPROM for that device must be initialized to all ‘0’s.
The following table indicates the EEPROM map to be used.
Table 37-6. EEPROM Address Map
Word Offset
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
Used By MAC
0,1,2
Upper Byte - Bits 15:8
Lower Byte - Bits 7:0
Init Control Word 1
S/W use only
S/W use only
S/W use only
S/W use only
S/W use only
S/W use only
S/W use only
Compatibility High
Compatibility High
Compatibility High
Compatibility High
Compatibility High
PBA, byte 1
PBA, byte 3
Compatibility Low
Compatibility Low
Compatibility Low
Compatibility Low
Compatibility Low
PBA, byte 2
PBA, byte 4
0
Management Control
0
Init Control Word 2
Init Control Word 3
0
IA Byte 2
IA Byte 1
0
IA Byte 4
IA Byte 3
0
IA Byte 6
IA Byte 5
0
IPv4 Byte 2
IPv4 Byte 1
0
IPv4 Byte 4
IPv4 Byte 3
0
IPv6 Byte 2
IPv6 Byte 1
0
IPv6 Byte 4
IPv6 Byte 3
0
IPv6 Byte 6
IPv6 Byte 5
0
IPv6 Byte 8
IPv6 Byte 7
0
IPv6 Byte 10
IPv6 Byte 9
0
IPv6 Byte 12
IPv6 Byte 11
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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