EP80579 Datasheet, PDF (1464/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 37-42. ICR1: Interrupt 1Cause Read Register (Sheet 3 of 3)
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 08C0h
Offset End: 08C3h
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 08C0h
Offset End: 08C3h
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 08C0h
Offset End: 08C3h
Size: 32 bits
Default: 00000000h
GbE0: Aux
Power Well: Gbe1/2:
Core
Bit Range
01
00
Bit Acronym
Bit Description
Sticky
TXQE
TXDW
Transmit Queue Empty. Set when the last descriptor
block for a transmit queue has been used.
Transmit Descriptor Written Back. Set when hardware
processes a descriptor with its RS bit set. If using delayed
interrupts (TDESC.IDE is set in the Transmit Descriptor
CMD), the interrupt is delayed until after one of the
delayed-timers (TIDV or TADV) expires.
Bit Reset
Value
0h
0h
Bit Access
RCWC
RCWC
37.6.3.7
ICS1 – Interrupt 1 Cause Set Register
Software uses this register to set an interrupt condition. Assuming the interrupt mask
is set, any bit written with a 1 triggers the corresponding interrupt, see “IMS0 –
Interrupt 0 Mask Set/Read Register” on page 1459 and “ICR0 – Interrupt 0 Cause Read
Register” on page 1454.
Table 37-43. ICS1: Interrupt 0 Cause Set Register (Sheet 1 of 2)
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 08C8h
Offset End: 08CBh
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 08C8h
Offset End: 08CBh
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 08C8h
Offset End: 08CBh
Size: 32 bits
Default: 00000000h
GbE0: Aux
Power Well: Gbe1/2:
Core
Bit Range Bit Acronym
Bit Description
31 : 29
28
27
26
25 : 24
23
Rsvd
Reserved
ERR_INTBUS Triggers Internal Bus Error
ERR_STAT Triggers Statistic Register ECC Error
ERR_MCFSPF Triggers Special Packet Filter Parity Error
Rsvd
Reserved
ERR_PKBUF Triggers DMA Packet Buffer ECC Error
Sticky
Bit Reset
Value
0h
0h
0h
0h
0h
0h
Bit Access
RV
RW
RW
RW
RV
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
1464
August 2009
Order Number: 320066-003US