EP80579 Datasheet, PDF (202/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 7-15. Bus 0, Device 2, Function 0: Summary of PCI Express Port A Standard and
Enhanced PCI Configuration Registers (Sheet 3 of 3)
Offset Start Offset End
Register ID - Description
Default
Value
130h
134h
140h
144h
148h
14Ch
150h
158h
160h
164h
168h
133h
137h
143h
147h
14Bh
14Fh
153h
15Bh
163h
167h
16Bh
“Offset 130h: RPERRMSTS - Root (Port) Error Message Status Register” on
page 583
00000000h
“Offset 134h: ERRSID - Error Source ID Register” on page 585
00000000h
“Offset 140h: PEAUNITERR - PCI Express Unit Error Register” on page 586
00000000h
“Offset 144h: PEAMASKERR - PCI Express Unit Mask Error Register” on page 588 0000E000h
“Offset 148h: PEAERRDOCMD - PCI Express Error Do Command Register” on
page 589
00000000h
“Offset 14Ch: UNCEDMASK - Uncorrectable Error Detect Mask Register” on
page 591
00000000h
“Offset 150h: COREDMASK - Correctable Error Detect Mask Register” on page 592 00000000h
“Offset 158h: PEAUNITEDMASK - PCI Express Unit Error Detect Mask Register” on
page 594
00000000h
“Offset 160h: PEAFERR - PCI Express First Error Register” on page 595
00000000h
“Offset 164h: PEANERR - PCI Express Next Error Register” on page 597
00000000h
“Offset 168h: PEAERRINJCTL - Error Injection Control Register” on page 597
00000000h
Intel^® EP80579 Integrated Processor Product Line Datasheet
202
August 2009
Order Number: 320066-003US