EP80579 Datasheet, PDF (244/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 7-60. Bus M, Device 4, Function 0: Summary of CAN Registers Mapped Through
CSRBAR Memory BAR
Offset Start Offset End
Register ID - Description
Default
Value
00000000h 00000003h “Offset 00000000h: Int_Status - Interrupt Status Register” on page 1587
00000000h
00000004h 00000007h “Offset 00000004h: Int_Ebl - Interrupt Enable Register” on page 1588
00000000h
00000008h 0000000Ah “Offset 00000008h: Buffer Status Indicators” on page 1589
00000000h
0000000Ch 0000000Fh “Offset 0000000Ch: ErrorStatus - Error Status Indicators” on page 1590
00000000h
00000010h 00000013h “Offset 00000010h: Command - Operating Modes” on page 1591
00000000h
00000014h 00000017h “Offset 00000014h: Config - CAN Configuration Register” on page 1592
00000000h
00000020h at 00000023h at “Offset 00000020h: TxMessageControl[0-7] - Transmit Message Control and
10h
10h
Command” on page 1593
XXXXXXXXh
00000024h at
10h
00000027h at
10h
“Offset 00000024h: TxMessageID[0-7] - Transmit Message ID” on page 1595
XXXXXXXXh
00000028h at 0000002Ah at “Offset 00000028h: TxMessageDataHigh[0-7] - Transmit Message Data High” on
10h
10h
page 1596
XXXXXXXXh
0000002Ch at 0000002Fh at “Offset 0000002Ch: TxMessageDataLow[0-7] - Transmit Message Data Low” on
10h
10h
page 1597
XXXXXXXXh
000000A0h at 000000A3h at “Offset 000000A0h: RxMessageControl[0-15] - Receive Message Command and
20h
20h
Control” on page 1598
XXXXXXXXh
000000A4h at
20h
000000A7h at
20h
“Offset 000000A4h: RxMessageID[0-15] - Receive Message ID” on page 1600
XXXXXXXXh
000000A8h at 000000ABh at “Offset 000000A8h: RxMessageDataHigh[0-15] - Receive Message Data High” on
20h
20h
page 1600
XXXXXXXXh
000000ACh at 000000AFh at “Offset 000000ACh: RxMessageDataLow[0-15] - Receive Message Data Low” on
20h
20h
page 1601
XXXXXXXXh
000000B0h at
20h
000000B3h at
20h
“Offset 000000B0h: RxMessageAMR[0-15] - Receive Message AMR” on page 1601
XXXXXXXh
000000B4h at
20h
000000B7h at
20h
“Offset 000000B4h: RxMessageACR[0-15] - Receive Message ACR” on page 1602
XXXXXXXXh
000000B8h at
20h
000000BBh at
20h
“Offset 000000B8h: RxMessageAMR_Data[0-15] - Receive Message AMR Data” on
page 1603
XXXXXXXXh
000000BCh at
20h
000000BFh at
20h
“Offset 000000BCh: RxMessageACR_Data[0-15] - Receive Message ACR Data” on
page 1604
XXXXXXXXh
Table 7-61. Bus M, Device 5, Function 0: Summary of CAN Registers Mapped Through
CSRBAR Memory BAR (Sheet 1 of 2)
Offset Start Offset End
Register ID - Description
00000000h
00000004h
00000008h
0000000Ch
00000010h
00000014h
00000003h
00000007h
0000000Ah
0000000Fh
00000013h
00000017h
“Offset 00000000h: Int_Status - Interrupt Status Register” on page 1587
“Offset 00000004h: Int_Ebl - Interrupt Enable Register” on page 1588
“Offset 00000008h: Buffer Status Indicators” on page 1589
“Offset 0000000Ch: ErrorStatus - Error Status Indicators” on page 1590
“Offset 00000010h: Command - Operating Modes” on page 1591
“Offset 00000014h: Config - CAN Configuration Register” on page 1592
Default
Value
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
Intel^® EP80579 Integrated Processor Product Line Datasheet
244
August 2009
Order Number: 320066-003US