EP80579 Datasheet, PDF (924/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
24.4.2.6.1 SM Bus Mode
The block write begins with a slave address and a write condition. After the command
code the CMI issues a byte count describing how many more bytes will follow in the
message. If a slave had 20 bytes to send, the first byte would be the number 20 (14h),
followed by 20 bytes of data. The byte count may not be 0. A block read or write is
allowed to transfer a maximum of 32 data bytes.
When programmed for a block write command, the transmit slave address, device
command, and Data0 (count) registers are sent. Data is then sent from the Block Data
Byte register; the total data sent being the value stored in the Data0 Register. On block
read commands, the first byte received is stored in the Data0 register, and the
remaining bytes are stored in the Block Data Byte register.
24.4.2.6.2 I²C Mode
The format of the command changes slightly for block commands if the I2C_EN bit is
set. The CMI still sends the number of bytes (on writes) or receive the number of bytes
(on reads) indicated in the DATA0 register. However, it does not send the contents of
the DATA0 register as part of the message.
The format of the command changes slightly for a block write if the I2C_EN bit is set.
The CMI still sends the number of bytes indicated in the DATA0 register. However, it
does not send the contents of the DATA0 register as part of the message.
The protocol for the block write and block read without PEC is shown in Table 24-40.
Table 24-40. Block Read/Write Protocol without PEC (Sheet 1 of 2)
Block Write Protocol
Block Read Protocol
Bit
Description
Bit
Description
1
2–8
9
10
11 – 18
19
20 – 27
28
29 – 36
37
38 – 45
46
...
...
...
...
Start
Slave Address - 7 bits
Write
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Byte Count - 8 bits (skip this step if I2C_EN bit
set)
Acknowledge from Slave (skip this step if
I2C_EN bit set)
Data Byte 1 - 8 bits
Acknowledge from Slave
Data Byte 2 - 8 bits
Acknowledge from slave
Data Bytes / Slave Acknowledges...
Data Byte N - 8 bits
Acknowledge from Slave
Stop
1
Start
2 – 8 Slave Address - 7 bits
9
Write
10 Acknowledge from slave
11 – 18 Command code - 8 bits
19 Acknowledge from slave
20 Repeated Start
21 – 27 Slave Address - 7 bits
28 Read
29 Acknowledge from slave
30 – 37 Byte Count from slave - 8 bits
38 Acknowledge
39 – 46 Data Byte 1 from slave - 8 bits
47 Acknowledge
48 – 55 Data Byte 2 from slave - 8 bits
56 Acknowledge
...
Data Bytes from slave/Acknowledge
Intel^® EP80579 Integrated Processor Product Line Datasheet
924
August 2009
Order Number: 320066-003US