EP80579 Datasheet, PDF (1610/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Note that the SSE bit is the only control bit that is reset to a known state, to ensure the
SSP is disabled following a reset. The reset state of all other control bits is unknown
and must be initialized before enabling the SSP.
40.4.2 SSP Control Register 1
40.4.2.1 Offset 04h: SSCR1 - SSP Control Register 1 Details
The SSP Control Register 1 (SSCR1) contains nine bit fields that control various SSP
functions.
Register Name:
SSCR1
Block
Base Address:
N/A
Offset Address
0x04
Reset Value 00000000
Register Description: SSC Control Register 1
Access: (See below.)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Table 40-3. Offset 04h: SSCR1 - SSP Control Register 1 Details (Sheet 1 of 2)
Description:
View: PCI
BAR: CSRBAR
Bus:Device:Function: M:6:0
Offset Start: 04h
Offset End: 07h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31 :16
15
14
13 :10
09 :06
05
04
Bit Acronym
Bit Description
Sticky
Reserved
STRF
EFWR
RFT
TFT
MWDS
SPH
Reserved
Select FIFO for EFWR:
0 = Transmit FIFO is selected for “enable FIFO write/
read”
1 = Receive FIFO is selected for “enable FIFO write/read”
Enable FIFO Write/Read:
0 = FIFO write/read function is disabled
1 = FIFO write/read function is enabled
Receive FIFO Threshold.
Sets threshold level at which Receive FIFO asserts
interrupt. This level should be set to the threshold value
minus 1.
Transmit FIFO Threshold.
Sets threshold level at which Transmit FIFO asserts
interrupt. This level should be set to the threshold value
minus 1.
National Microwire* Data Size
0 = 8 bit Microwire format
1 = 16 bits Microwire format
Motorola* SPI SSP_SCLK phase setting:
0 = SSP_SCLK is inactive one full cycle at the start of a
frame and 1/2 cycle at the end of a frame.
1 = SSP_SCLK is inactive 1/2 cycle at the start of a
frame and one full cycle at the end of a frame.
Bit Reset
Value
0h
0b
0b
0h
0h
0b
0b
Bit Access
RV
RW
RW
RW
RW
RW
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
1610
August 2009
Order Number: 320066-003US