EP80579 Datasheet, PDF (1116/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 30-2. Interrupt Options - APIC Mode
IRQ # SERIRQ
Pin
PCI Message
Internal Modules
0
No
No
No
Cascade from 8259 1
1
Yes
No
Yes
2
No
No
No
8254 Counter 0, MMT 0 (legacy mode)
3
Yes
No
Yes
4
Yes
No
Yes
5
Yes
No
Yes
6
Yes
No
Yes
7
Yes
No
Yes
8
No
No
No
RTC, MMT 1 (legacy mode)
9
Yes
No
Yes
Option for SCI, TCO
10
Yes
No
Yes
Option for SCI, TCO
11
Yes
No
Yes
Option for SCI, TCO
12
Yes
No
Yes
13
No
No
No
FERR# Logic
14
Yes
Yes
Yes
SATA Primary (legacy mode)
15
Yes
Yes
Yes
SATA Secondary (legacy mode)
16
PIRQA
No
17
PIRQB
No
18
PIRQC
No
See Section 30.5 for how internal devices are
mapped.
19
PIRQD
No
Yes
20
N/A
PIRQE
21
N/A
PIRQF
22
N/A
PIRQG
Option for SCI, TCO, and HPET (High Precision Event
Timer) For other internal devices, see Section 30.5
23
N/A
PIRQH
24
N/A
GPIO[16]
N/A
External GPIO driven interrupt
25
N/A
GPIO[17]
N/A
External GPIO driven interrupt
26
N/A
GPIO[20]
N/A
External GPIO driven interrupt
27
N/A
GPIO[21]
N/A
External GPIO driven interrupt
28
N/A
GPIO[23]
N/A
External GPIO driven interrupt
29
N/A
GPIO[24]
N/A
External GPIO driven interrupt
30
N/A
GPIO[28]
N/A
External GPIO driven interrupt
31
N/A
GPIO[30]
N/A
External GPIO driven interrupt
32
N/A
GPIO[31]
N/A
External GPIO driven interrupt
Notes:
1.
If an interrupt is used for PCI IRQ[A:H], SCI, or TCO, it must not be used for ISA (legacy)-style
interrupts (via SERIRQ).
2.
PIRQ[A-D]do not come out on the pins any longer.
3.
In APIC mode, the PCI interrupts A:H are mapped to IRQ[16:23].
4.
When programming the polarity of internal interrupt sources on the APIC, interrupts 0 through 15
receive active-high internal interrupt sources; interrupts 16 through 23 receive active-low internal
interrupt sources.
5.
IRQ24-39 are externally driven interrupts through GPIO pins, enabled if GPIO_IRQ_STRAP_STS field
of Extended Test Mode Register3 (ETR3) is set to 1 (set by externally pulling strap siu2_txd_ad18 to
LOW on the rising edge of PWROK) and if each of the 16 IRQ capable GPIO pins is configured to work
in alternative mode (in GPIO_USE_SEL1/GPIO_USE_SEL2 registers).
Intel^® EP80579 Integrated Processor Product Line Datasheet
1116
August 2009
Order Number: 320066-003US