EP80579 Datasheet, PDF (321/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
In this mode, the EDMA will write to the address that is placed in the DAR/DUAR pair
with the transfer size specified in the granularity field. The transfers will continue until
the byte count register is satisfied. Logically, transfers will only be memory to memory
mapped I/O.
Constant address mode can be used with an increasing or decreasing source address to
present data to the external device in either order.
Figure 12-7 through Figure 12-9 illustrate data transfers between an unaligned 64-bit,
source and a constant destination addresses when the source is in increment mode.
Figure 12-7. Source in Increment and Destination in 1-Byte Granularity Constant Mode
Transfer
MSB
64-bit Source
7
6
15
14
Data Block
Transfer
Memory
5
4
3
2
1
13
12
11
10
9
20
19
18
17
LSB
ADDRESS
A000 0200H
8
A000 0208H
16
A000 0210H
1
2
64-bit Destination
20
Programmed Values
EDMACTL 0000 0088H
SUAR/SAR _{A000 0201H}
DUAR/DAR 4001 0307H
TCR _{0000 0014H}
DCR 0000 403FH
4001 0300H
4001 0300H
4001 0300H
4001 0300H
10
byte number
Bus Operation
SOURCE
QWORD load@A0000200
QWORD load@A0000208
QWORD load@A0000210
DESTINATION
Byte store@40010307
(20 times)
B4486-01
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
321