EP80579 Datasheet, PDF (606/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.5.1.4 Offset 44h: DCALADDR - DDR Calibration Address Register
Table 16-229.Offset 44h: DCALADDR - DCAL Address Register
Description: DCALADDR - DCAL Address Register
View: PCI
BAR: SMRBASE
Bus:Device:Function: 0:0:0
Offset Start: 44h
Offset End: 47h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31 :00
Bit Acronym
Bit Description
DCALADDR
DCAL Address and Other Information based on
DCALCSR.OPCODE. See Table 16-230.
Sticky
Bit Reset
Value
Bit Access
N
00000000h
RW
Table 16-230.Interpretation of DCALADDR (Sheet 1 of 2)based on DCALCSR.OPCODE
NOP, Refresh, Pre-Charge,
MRS/EMRS, and Self-Refresh
Bit
Entry Commands initiated by
DCALCSR
Receive Enable
DQS Delay Cal
31
DRAM Address Bus 15:0
Row Address 15:0
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Row Address 15:0
Intel^® EP80579 Integrated Processor Product Line Datasheet
606
August 2009
Order Number: 320066-003US