EP80579 Datasheet, PDF (1518/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
37.6.6.25 GPRC – Good Packets Received Count (Total) Register
This register counts the number of good packets (no link or CRC error) received that
are of any legal length. This register includes good regular packets received to the
Receive Packet Buffer. Regular packets identified as Missed Packets due to Receive
Packet Buffer overruns are not included in this count (refer to the “MPC – Missed Packet
Count Register” on page 1507). This register should represent the sum of the Good
Packets Received (Size=N) counts, and when the driver is enabled, should normally
represent the total number of packets received to the driver.
Table 37-103.GPRC: Good Packets Received Count (Total) Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 4074h
Offset End: 4077h
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 4074h
Offset End: 4077h
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 4074h
Offset End: 4077h
Size: 32 bits
Default: 00000000h
GbE0: Aux
Power Well: Gbe1/2:
Core
Bit Range Bit Acronym
Bit Description
31 : 00
GPRC
Number of good packets received (total of all lengths)
Sticky
Bit Reset
Value
0h
Bit Access
RC
37.6.6.26 BPRC – Broadcast Packets Received Count Register
This register counts the number of good (non-erred) broadcast packets received. This
register does not count broadcast packets received when the broadcast address filter is
disabled.
Table 37-104.BPRC: Broadcast Packets Received Count Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 4078h
Offset End: 407Bh
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 4078h
Offset End: 407Bh
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 4078h
Offset End: 407Bh
Size: 32 bits
Default: 00000000h
GbE0: Aux
Power Well: Gbe1/2:
Core
Bit Range Bit Acronym
Bit Description
31 : 00
BPRC
Number of broadcast packets received
Sticky
Bit Reset
Value
0h
Bit Access
RC
Intel^® EP80579 Integrated Processor Product Line Datasheet
1518
August 2009
Order Number: 320066-003US