EP80579 Datasheet, PDF (961/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 25-27. SOFMOD: Start of Frame Modify Register
Description:
View: PCI
BAR: USBIOBAR (IO)
Bus:Device:Function: 0:29:0
Offset Start: 0Ch
Offset End: 0Ch
Size: 8 bit
Default: 40h
Power Well: Core
Bit Range
07
Bit Acronym
Bit Description
Sticky
Reserved
Reserved
SOF Timing Value: Guidelines for the modification of
frame time are contained in Chapter 7 of the USB
Specification. The SOF cycle time (number of SOF
counter clock periods to generate a SOF frame length) is
equal to 11936 + value in this field. The default value is
decimal 64 which gives a SOF cycle time of 12000. For a
12 MHz SOF counter clock input, this produces a 1 ms
Frame period. The following table indicates what SOF
Timing Value to program into this field for a certain
frame period.
Bit Reset
Value
0h
Bit Access
06 : 00
SOFTV
Frame Length
(# 12 MHz
Clocks)
(decimal)
11936
11937
—
11999
12000
12001
—
12062
12063
SOF Timing Value
(this register)
(decimal)
0
1
—
63
64
65
—
126
127
40h
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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