EP80579 Datasheet, PDF (1571/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
39.4
39.4.1
39.4.2
Note:
Usage Model
CAN Basics
CAN is an asynchronous serial bus system. The bus structure is open and linear, with
equal bus nodes. A CAN bus typically consists of two or more nodes. Nodes can be
added to the CAN network dynamically without interrupting the communication of other
nodes. That makes it easy to add or take off bus nodes (e.g. for adding functionality to
the system, error recovery or monitoring).
The CAN bus is a “wired-AND” mechanism, where recessive bits (high) are overwritten
by dominant bits (low). If no nodes are driving a dominant bit, the bus stays in the
recessive state (idle). The node that first drives a dominant bit becomes the master
and owns the bus. One of the cheapest and most common mediums is a twisted
differential wire pair. The two lines are “CAN_H” and CAN_L”, which can be connected
directly to the nodes via a connector. The maximum speed for the CAN bus is 1Mbps up
to 40m. For bus length beyond 40 m, the bus speed must be reduced. Up to 30 nodes
can be connected without extra equipment. CAN is insensitive to EMI because a
differential pair will be affected in the same way.
The bit stream in a message is coded according on the Non-Return-to-Zero (NRZ)
method, which means the signal level remains constant over the bit time and thus one
time slot is required to represent a bit. To guarantee proper synchronization of all bus
nodes, bit stuffing must be used. If five consecutive bits of the same polarity have been
driven by the master, the sixth bit will be of opposite polarity, then the master will
continue to transmit. Every receiver on the bus will check for the amount of bits with
the same polarity, and will destuff (the sixth bit) the message.
Addressing and Bus Arbitration
The CAN protocol uses CSMA/CD with NDA (Carrier Sense Multiple Access/Collision
Detection with Non-Destructive Arbitration) for bus arbitration.
A node that wants to transmit a message onto the network must first check if the CAN
bus is in the “idle” state (Carrier Sense). The node then becomes the master by
transmitting its message. Every other node will switch to receive mode during the Start
of Frame bit, see Figure 39-2. After receiving a message with no errors, all nodes sends
an acknowledge, and store the message if required. If message storage is not required,
the message is discarded.
If multiple nodes start their transmission simultaneously (Multiple Access), collision is
avoided by the use of bitwise arbitration (Collision Detection/Non-Destructive
Arbitration), and the “Wired-AND” mechanism. The node that sends out a recessive bit
in its identifier field (MSB first), but reads back a dominant bit, loses arbitration and
switches to receive mode. The competitive node won arbitration because it had a
higher priority. This way, nodes with higher priority do not have to waste time re-
sending their message. The nodes that lose arbitration will automatically attempt to re-
send their message after the bus becomes “idle”.
Different nodes cannot have similar identifiers on the same network.
Standard CAN (CAN2.0A) has an 11 bit identifier field, see Figure 39-2, allowing a total
of 2048 identifiers. This limitation has been improved by the Extended CAN (CAN2.0B),
which has either a 11 and/or a 29 bit identifier field, resulting in a total of 536 million
identifiers. See Figure 39-2.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1571