EP80579 Datasheet, PDF (977/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
26.0
USB 2.0 Host Controller: Bus 0, Device 29,
Function 7
26.1
Overview
This section focuses on CMI-specific implementation details of the Universal Serial Bus
(USB) Specification, Revision 2.0 and Enhanced Host Controller Interface (EHCI)
Specification for Universal Serial Bus specifications.
Register address locations not shown in Section 26.2 must be treated as Reserved.
Note:
All configuration registers in this section are in the Core Well and reset by a Core Well
reset and the D3-to-D0 warm reset, except as noted.
CMI contains an Enhanced Host Controller Interface (EHCI) compliant host controller
which supports up to two USB Rev. 2.0 Specification-compliant root ports. USB 2.0
allows data transfers up to 480 Mbits/s using the same pins as the two USB1 ports. CMI
contains port-routing logic that determines whether a USB port is controlled by one of
the UHCI controllers or by the EHCI controller. A USB 2.0-based Debug Port is also
implemented in CMI. A summary of the key architectural differences between the USB
1.1 UHCI host controllers and the USB 2.0 EHCI host controller is shown in the table
below:
Table 26-1. USB 1.1 and USB 2.0 Comparison
Accessible by
Memory Data Structure
Differential Signaling Voltage
Controllers
Ports per Controller
USB 1.1 UHCI
I/O space
Single linked list
3.3 V
1
2
USB 2.0 EHCI
Memory Space
Separated in to Periodic and Asynchronous lists
400 mV
1
2
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
977