EP80579 Datasheet, PDF (1189/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 33-21. Offset 06h: MSR - Modem Status Register
Description:
View: IA F
Base Address: Base (IO)
Offset Start: 06h
Offset End: 06h
Size: 8 bit
Default: 00h
Power Well: Core
Bit Range
07
06
05
04
03
02
01
00
Bit Acronym
Bit Description
Sticky
DCD
RI
DSR
CTS
DDCD
TERI
DDSR
DCTS
Data Carrier Detect: This bit is the complement of the
Data Carrier Detect (DCD#) input. This bit is equivalent
to bit OUT2 of the Modem Control register if LOOP in the
MCR is set to 1.
0 = DCD# pin is 1
1 = DCD# pin is 0
Ring Indicator: This bit is the complement of the ring
Indicator (RI#) input. This bit is equivalent to bit OUT1
of the Modem Control register if LOOP in the MCR is set
to 1.
0 = RI# pin is 1
1 = RI# pin is 0
Data Set Ready: This bit is the complement of the
Data Set Ready (DSR#) input. This bit is equivalent to
bit DTR of the Modem Control register if LOOP in the
MCR is set to 1.
0 = DSR# pin is 1
1 = DSR# pin is 0
Clear to Send: This bit is the complement of the Clear
to Send (CTS#) input. This bit is equivalent to bit RTS of
the Modem Control register if LOOP in the MCR is set to
1.
0 = CTS# pin is 1
1 = CTS# pin is 0
Delta Data Carrier Detect:
0 = No change in DCD# pin since last read of MSR
1 = DCD# pin has changed state
Trailing Edge Ring Indicator:
0 = RI# pin has not changed from 0 to 1 since last read
of MSR
1 = RI# pin has changed from 0 to 1
Delta Data Set Ready:
0 = No change in DSR# pin since last read of MSR
1 = DSR# pin has changed state
Delta Clear To Send:
0 = No change in CTS# pin since last read of MSR
1 = CTS# pin has changed state
Bit Reset
Value
0b
0b
0b
0b
0b
0b
0b
0b
Bit Access
RO
RO
RO
RO
RO
RO
RO
RO
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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