EP80579 Datasheet, PDF (14/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Contents
16.4.1 Register Details ...................................................................................... 527
16.4.1.1 Offset 00h: VID - Vendor Identification Register .................................. 527
16.4.1.2 Offset 02h: DID - Device Identification Register .................................. 527
16.4.1.3 Offset 02h: DID - Device Identification Register .................................. 528
16.4.1.4 Offset 04h: PCICMD - PCI Command Register ..................................... 528
16.4.1.5 Offset 06h: PCISTS - PCI Status Register ........................................... 530
16.4.1.6 Offset 08h: RID - Revision Identification Register ................................ 531
16.4.1.7 Offset 0Ah: SUBC - Sub-Class Code Register....................................... 532
16.4.1.8 Offset 0Bh: BCC - Base Class Code Register........................................ 532
16.4.1.9 Offset 0Ch: CLS - Cache Line Size Register ......................................... 533
16.4.1.10 Offset 0Eh: HDR - Header Type Register............................................. 533
16.4.1.11 Offset 18h: PBUSN - Primary Bus Number Register .............................. 534
16.4.1.12 Offset 19h: SBUSN - Secondary Bus Number Register .......................... 534
16.4.1.13 Offset 1Ah: SUBUSN - Subordinate Bus Number Register...................... 535
16.4.1.14 Offset 1Ch: IOBASE - I/O Base Address Register ................................. 535
16.4.1.15 Offset 1Dh: IOLIMIT - I/O Limit Address Register ................................ 536
16.4.1.16 Offset 1Eh: SECSTS - Secondary Status Register ................................. 536
16.4.1.17 Offset 20h: MBASE - Memory Base Address Register ............................ 538
16.4.1.18 Offset 22h: MLIMIT - Memory Limit Address Register ........................... 538
16.4.1.19 Offset 24h: PMBASE - Prefetchable Memory Base Address Register ........ 539
16.4.1.20 Offset 26h: PMLIMIT - Prefetchable Memory Limit Address Register ....... 540
16.4.1.21 Offset 28h: PMBASU - Prefetchable Memory Base
Upper Address Register.................................................................... 541
16.4.1.22 Offset 2Ch: PMLMTU - Prefetchable Memory Limit Upper
Address Register ............................................................................. 541
16.4.1.23 Offset 34h: CAPPTR - Capabilities Pointer Register ............................... 542
16.4.1.24 Offset 3Ch: INTRLINE - Interrupt Line Register.................................... 542
16.4.1.25 Offset 3Dh: INTRPIN - Interrupt Pin Register ...................................... 543
16.4.1.26 Offset 3Eh: BCTRL - Bridge Control Register ....................................... 543
16.4.1.27 Offset 44h: VSCMD0 - Vendor Specific Command Byte 0 Register .......... 544
16.4.1.28 Offset 45h: VSCMD1 - Vendor Specific Command Byte 1 Register .......... 546
16.4.1.29 Offset 46h: VSSTS0 - Vendor Specific Status Byte 0 Register ................ 547
16.4.1.30 Offset 47h: VSSTS1 - Vendor Specific Status Byte 1 Register ................ 547
16.4.1.31 Offset 48h: VSCMD2 - Vendor Specific Command Byte 2 Register .......... 548
16.4.1.32 Offset 50h: PMCAPID - Power Management Capabilities
Structure Register ........................................................................... 548
16.4.1.33 Offset 51h: PMNPTR - Power Management Next Capabilities Pointer Register
549
16.4.1.34 Offset 52h: PMCAPA - Power Management Capabilities
Register ......................................................................................... 549
16.4.1.35 Offset 54h: PMCSR - Power Management Status and Control
Register ......................................................................................... 550
16.4.1.36 Offset 56h: PMCSRBSE - Power Management Status and Control Bridge
Extensions Register ......................................................................... 551
16.4.1.37 Offset 58h: MSICAPID - MSI Capabilities Structure Register .................. 551
16.4.1.38 Offset 59h: MSINPTR - MSI Next Capabilities Pointer Register ............... 552
16.4.1.39 Offset 5Ah: MSICAPA - MSI Capabilities Register ................................. 552
16.4.1.40 Offset 5Ch: MSIAR - MSI Address for PCI Express* Register.................. 553
16.4.1.41 Offset 60h: MSIDR - MSI Data Register .............................................. 554
16.4.1.42 Offset 64h: PEACAPID - PCI Express* Features Capabilities ID
Register ......................................................................................... 555
16.4.1.43 Offset 65h: PEANPTR - PCI Express* Next Capabilities Pointer
Register ......................................................................................... 556
16.4.1.44 Offset 66h: PEACAPA - PCI Express* Features Capabilities Register........ 556
16.4.1.45 Offset 68h: PEADEVCAP - PCI Express* Device Capabilities
Register ......................................................................................... 557
16.4.1.46 Offset 6Ch: PEADEVCTL - PCI Express* Device Control Register ............ 558
16.4.1.47 Offset 6Eh: PEADEVSTS - PCI Express* Device Status Register ............. 560
16.4.1.48 Offset 70h: PEALNKCAP - PCI Express* Link Capabilities Register .......... 561
16.4.1.49 Offset 70h: PEA1LNKCAP - PCI Express* Link Capabilities Register......... 561
Intel^® EP80579 Integrated Processor Product Line Datasheet
14
August 2009
Order Number: 320066-003US