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EP80579 Datasheet, PDF (1145/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line
Intel® EP80579 Integrated Processor
31.0 8254 Timers
31.1
Overview
The IICH contains three counters which have fixed uses. All registers and functions
associated with the 8254 timers are in the core power well. The 8254 unit is clocked by
a 14.31818 MHz clock.
There is one signal associated with the 8254. It is used to drive the PC speaker.
Table 31-1. SPKR Signal
Signal Name
S3
S5
SPKR
Off
Off
31.2
8254 Timer I/O-Mapped Register Details
Note:
For more information on the format of the register description tables that follow in this
chapter, see Section 7.1.1, “Register Description Tables” on page 183.
Table 31-2. Summary of 8254 Timer Registers Mapped in I/O Space
Offset Start Offset End
Register ID - Description
Default
Value
43h
40h at 01h
40h at 01h
43h
40h at 01h
40h at 01h
“Offset 43h: TCW - Timer Control Word Register” on page 1146
XXh
“Offset 40h: TSB[0-2] - Interval Timer Status Byte Format Register” on page 1147 0XXXXXXXb
“Offset 40h: TCAP[0-2] - Interval Timer Counter Access Ports Register” on
page 1148
XXh
August 2009
Order Number: 320066-003US
Intel® EP80579 Integrated Processor Product Line Datasheet
1145