EP80579 Datasheet, PDF (152/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
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Table 5-18. Summary of USB 2.0 Interface Error Conditions
Event
Type
Fatality^a
Reports via
Notes
Host System Error Uncorrectable
USB Error
Parity Error
Uncorrectable
Uncorrectable
System Error
Uncorrectable
Fatal
Fatal
Fatal
Fatal
Interrupt
Interrupt
SERR
SERR
Serious error during host system
access involving HC module.
USB transaction completion ended in
error.
Parity error on USB read completion.
Parity error on address, command, or
data, or unsuccessful completion of
ECH-initiated read.
a. “Fatal” events result in data loss or data corruption that the unit cannot repair, “Non-Fatal” events do not.
Table 5-19 summarizes the capabilities of the USB 2.0 controller error handling for each
of the features that the unit is expected to provide.
Table 5-19. Summary of USB 2.0 Interface Error Reporting Capabilities
Feature
Enabling and Masking Error
Reporting
Logging Details
Reporting Multiple Errors
Data Poisoning
Implementation
The CMD and USB20INTR registers supports error enabling and masking.
The USB 2.0 interface captures the type of event detected in the DSR
and USB20STS registers.
The USB 2.0 interface does not capture multiple events, error events
cause the interface to halt operation until serviced by software.
IICH backbone does not support data poisoning.
For additional details on error handling in the USB 2.0 controller, see Section 26.0,
“USB 2.0 Host Controller: Bus 0, Device 29, Function 7”.
5.4.5
SATA Interface
The IICH provides a SATA interface that can generate an interrupt on error events and
can also use the PCI PERR infrastructure to report errors. Table 5-20 summarizes the
error conditions that the controller reports.
.
Table 5-20. Summary of SATA Interface Error Conditions
Event
Type
Fatality^a
Reports via
Notes
Host Bus Fatal
Error
Host Bus Data
Error
Interface Fatal
Error
Interface Non-
Fatal Error
Parity Error
Uncorrectable
Uncorrectable
Uncorrectable
Uncorrectable
Uncorrectable
Fatal
Fatal
Fatal
Non-Fatal
Fatal
Interrupt Unrecoverable host bus error
Interrupt Uncorrectable data error.
Interrupt Fatal error on SATA interface.
Interrupt
SERR
Non-fatal error on SATA interface.
Parity error detected on interface.
a. “Fatal” events result in data loss or data corruption that the unit cannot repair, “Non-Fatal” events do not.
Table 5-21 summarizes the capabilities of the SATA controller error handling for each of
the features that the unit is expected to provide.
Intel^® EP80579 Integrated Processor Product Line Datasheet
152
August 2009
Order Number: 320066-003US