EP80579 Datasheet, PDF (1622/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
41.4
Usage Model
41.4.1
Channel Mapping
Ten channels are supported which are mapped to the Ethernet and CAN interfaces as
shown in the table below:
Table 41-1. Channel Mapping to Interfaces
Channel
Ethernet Channel 0
Ethernet Channel 1
Ethernet Channel 2
Ethernet Channel 3
Ethernet Channel 4
Ethernet Channel 5
Ethernet Channel 6
Ethernet Channel 7
CAN Channel 0
CAN Channel 1
Interface
Being
Monitored
N/A
N/A
N/A
Gbe 0 GMII/MII
Gbe 1 GMII/MII
N/A
N/A
N/A
CAN 0
CAN 1
Notes
Reserved for future use
Reserved for future use
Reserved for future use
Both GMII and MII modes supported
Both GMII and MII modes supported
Reserved for future use
Reserved for future use
Reserved for future use
Supports simple timestamping of packets
Supports simple timestamping of packets
41.5
Functional Description
41.5.1
IEEE 1588 Overview
A simplified view of an example 1588 Network topology is shown in Figure 41-2,
“Example Network Topology” on page 1623. Each device in an IEEE 1588 enabled
network may have one or more ports each of which is defined to be a master or a slave
port. Each slave synchronizes it’s internal clock to that of the master. Each master-
enabled port may also act as a slave. The specific hierarchy of the network is
determined dynamically.
There are five basic types of Precision Time Protocol (PTP) devices:
• Ordinary clock.
• Boundary clock.
• End-to-end transparent clock.
• Peer-to-peer transparent clock.
• Management node.
An ordinary clock communicates with the network via a single physical port. This
interface is used to send and receive PTP messages, which are time stamped based on
the value of the local clock. The ordinary clock can be the grandmaster clock in a
system or it can be a slave clock in the master-slave hierarchy.
The boundary clock typically has several physical ports. Each port of a boundary clock
is similar to the port of an ordinary clock, but the local clock is now common to all the
ports. Each port of the boundary clock terminates all messages related to
synchronization and establishing the master-slave hierarchy.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1622
August 2009
Order Number: 320066-003US