EP80579 Datasheet, PDF (492/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.2.1.45 Offset A0h: DRAM_SECF_ADD - DRAM First Single Bit Error Correct
Address Register
Captures the address of the SEC error occurring in the memory system (including
scrubs). The value in this register is only valid if the Correctable Read Memory Error bit
in the DRAM_FERR register has been set. The bits in this register are sticky through
reset. (see Section 16.2.1.36, “Offset 80h: DRAM_FERR - DRAM First Error Register”).
Table 16-99. Offset A0h: DRAM_SECF_ADD - DRAM First Single Bit Error Correct Address
Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:0:1
Offset Start: A0h
Offset End: A3h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31
30 :02
01 :00
Bit Acronym
Bit Description
Sticky
Reserved Reserved
First Correctable Error Address: This field contains
system address bits 34:06 for the first correctable error
FSEFADD (DRAM_FERR). This field is set by hardware, and
Y
represents a physical address. This field can only be reset
by a PWRGD reset.
Reserved Reserved
Bit Reset
Value
0b
0000000h
00b
Bit Access
RO
RO
RO
16.2.1.46 Offset A4h: DRAM_DED_ADD - DRAM Double Bit Error Address
Register
Captures the address of the first DED (uncorrectable non-scrub engine) error occurring
in the memory system. The value in this register is only valid if the Uncorrectable Read
Memory Error bit in the DRAM_FERR register or the DRAM_NERR register has been set.
The bits in this register are sticky through reset.
Table 16-100.Offset A4h: DRAM_DED_ADD - DRAM Double Bit Error Address Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:0:1
Offset Start: A4h
Offset End: A7h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31
30 :02
01 :00
Bit Acronym
Bit Description
Sticky
Reserved Reserved
First Uncorrectable Error Address: This field contains
FUERRAD
address bits 34:06 for the first uncorrectable error. This
field is set by hardware, and represents a physical address.
Y
This field is only reset by a PWRGD reset.
Reserved Reserved
Bit Reset
Value
0b
0000000h
00b
Bit Access
RO
RO
RO
Intel^® EP80579 Integrated Processor Product Line Datasheet
492
August 2009
Order Number: 320066-003US