EP80579 Datasheet, PDF (206/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
7.3.6
USB (1.1) Controller: Bus 0, Device 29, Functions 0
The USB 1.1 controller includes the registers listed in Table 7-17 and Table 7-18. These
registers materialize in PCI configuration and I/O spaces (via PCI I/O BAR),
respectively. See Chapter 25.0, “USB (1.1) Controller: Bus 0, Device 29, Function 0”
for detailed discussion of these registers.
Table 7-17. Bus 0, Device 29, Functions 0, Summary of USB (1.1) Controller PCI
Configuration Registers
Offset Start Offset End
Register ID - Description
00h
04h
06h
08h
0Ah
0Bh
0Dh
0Eh
20h
2Ch
2Eh
3Ch
3Dh
60h
C0h
C4h
C8h
F8h
03h
05h
07h
08h
0Ah
0Bh
0Dh
0Eh
23h
2Dh
2Fh
3Ch
3Dh
60h
C1h
C4h
C8h
FBh
“ID - Identifiers Register” on page 942
“PCICMD - Command Register” on page 942
“PCISTS - Device Status Register” on page 943
“RID - Revision ID Register” on page 944
“SUBC - Sub Class Code Register” on page 945
“BCC - Base Class Code Register” on page 945
“MLT - Master Latency Timer Register” on page 945
“HDR - Header Type Register” on page 946
“USBIOBAR - Base Address Register” on page 946
“USBx_SVID - USB Subsystem Vendor ID Register” on page 947
“USBx_SID - USB Subsystem ID Register” on page 947
“INTL - Interrupt Line Register” on page 948
“INTP - Interrupt Pin Register” on page 948
“SBRN - Serial Bus Release Number Register” on page 948
“USBLKMCR - USB Legacy Keyboard/Mouse Control Register” on page 949
“USBREN - USB Resume Enable Register” on page 951
“USBCWP - USB Core Well Policy Register” on page 951
“MANID - Manufacturer ID Register” on page 952
Default
Value
50338086h
0000h
0280h
Variable
03h
0Ch
00h
Variable
00000001h
0000h
0000h
00h
Variable
10h
2000h
00h
00h
00010F90h
Table 7-18. Summary of USB (1.1) Controller Configuration Registers Mapped Through
USBIOBAR I/O BAR
Offset Start Offset End
Register ID - Description
00h
01h
“USBCMD: USB Command Register” on page 954
02h
03h
“USBSTS: USB Status Register” on page 957
04h
05h
“USBINTR: USB Interrupt Enable Register” on page 959
06h
07h
“FRNUM: Frame Number Register” on page 959
08h
0Bh
“FRBASEADD: Frame List Base Address Register” on page 960
0Ch
0Ch
“SOFMOD: Start of Frame Modify Register” on page 961
10h
11h
“PSCR - Port Status and Control Register” on page 962
12h
13h
“PSCR - Port Status and Control Register” on page 962
Default
Value
0000h
0020h
0000h
0000h
XXXXX000h
40h
0080h
0080h
Intel^® EP80579 Integrated Processor Product Line Datasheet
206
August 2009
Order Number: 320066-003US