EP80579 Datasheet, PDF (1481/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
37.6.4.6
RDLEN – Receive Descriptor Length Register
This register sets the number of bytes allocated for descriptors in the circular descriptor
buffer. This value must be 128B aligned (i.e., the lower 7 bits are always 0).
Table 37-55. RDLEN: Receive Descriptor Length Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 2808h
Offset End: 280Bh
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 2808h
Offset End: 280Bh
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 2808h
Offset End: 280Bh
Size: 32 bits
Default: 00000000h
GbE0: Core
Power Well: Gbe1/2:
Core
Bit Range Bit Acronym
Bit Description
31 : 20
19 : 07
06 : 00
Rsvd
LEN
0
Reserved
Descriptor Length
Writes are ignored, reads return 0.
Sticky
Bit Reset
Value
0h
0h
0h
Bit Access
RV
RW
RV
37.6.4.7
RDH – Receive Descriptor Head Register
This register contains the head pointer for the receive descriptor buffer. The register
points to a 16B datum. Hardware controls the pointer. Writing this register at any time
will cause indeterminate behavior.
Table 37-56. RDH: Receive Descriptor Head Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 2810h
Offset End: 2813h
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 2810h
Offset End: 2813h
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 2810h
Offset End: 2813h
Size: 32 bits
Default: 00000000h
GbE0: Core
Power Well: Gbe1/2:
Core
Bit Range Bit Acronym
Bit Description
31 : 16
15 : 00
Rsvd
RDH
Reserved
Receive Descriptor Head
Sticky
Bit Reset
Value
0h
0h
Bit Access
RV
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1481