EP80579 Datasheet, PDF (1044/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
If a high-speed device is attached, the EHCI will automatically set the Port Enabled/
Disabled bit in the PORTSC register and the debug software can proceed. Debug
software must set the ENABLED_CNT bit in the Debug Port Control/Status register, and
then reset (clear) the Port Enabled/Disabled bit in the PORTSC register and the Run/
Stop bit in the EHCI Command Register. The EHCI bits are cleared in order to present
the proper default idle conditions to the EHCI driver as it loads.
26.13.3.4.4 Debug Software Startup with Initialized EHCI
Debug software can attempt to use the debug port if the Current Connect Status bit in
the appropriate (See Section 26.13.3.4.2, “Determining the Debug Port”) PORTSC
register is set. If the Current Connect Status bit is not set, then debug software may
terminate or it may wait until a device is connected.
If a device is connected, then debug software must set the OWNER_CNT bit and then
the ENABLED_CNT bit in the Debug Port Control/Status register.
26.13.3.4.5 Determining Debug Peripheral Presence
After enabling the debug port functionality, debug software can determine if a debug
peripheral is attached by attempting to send data to the debug peripheral. If all
attempts result in an error (Exception bits in the Debug Port Control/Status register
indicates a Transaction Error), then the attached device is not a debug peripheral. If the
debug port peripheral is not present, then debug software may terminate or it may wait
until a debug peripheral is connected.
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Intel^® EP80579 Integrated Processor Product Line Datasheet
1044
August 2009
Order Number: 320066-003US