EP80579 Datasheet, PDF (1527/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
37.6.6.40 TOTL – Total Octets Transmitted Low Register
This the low 32b of a 64b register that counts the total number of octets in successfully
transmitted packets. Octets transmitted as part of partial packet transmission (e.g.
collisions in half-duplex mode) are not included. Octets will be counted for all packets
regardless of their length and regardless of whether regular packets or flow-control
packets. Octets from the <Destination Address> field through the <CRC> field are
included in this count. {TOTH,TOTL} together make up a logical 64-bit register. Each
half must be accessed independently using separate 32-bit accesses. Both registers are
reset when the upper 32-bit value (TOTH) is read. The register sticks at
0xFFFF_FFFF_FFFF_FFFF.
Table 37-118.TOTL: Total Octets Transmitted Low Register
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 40C8h
Offset End: 40CFh
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 40C8h
Offset End: 40CFh
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 40C8h
Offset End: 40CFh
Size: 32 bits
Default: 00000000h
Power
Well:
GbE0: Aux
Gbe1/2: Core
Bit Range Bit Acronym
Bit Description
31 : 00
TOTL
Number of total octets transmitted - lower 4 bytes
Sticky
Bit Reset
Value
0h
Bit Access
RC
37.6.6.41 TOTH – Total Octets Transmitted High Register
This the high 32b of a 64b register that counts the total number of octets in
successfully transmitted packets. Octets transmitted as part of partial packet
transmission (e.g. collisions in half-duplex mode) are not included. Octets will be
counted for all packets regardless of their length and regardless of whether regular
packets or flow-control packets. Octets from the <Destination Address> field through
the <CRC> field are included in this count. {TOTH,TOTL} together make up a logical
64-bit register. Each half must be accessed independently using separate 32-bit
accesses. Both registers are reset when the upper 32-bit value (TOTH) is read. The
register sticks at 0xFFFF_FFFF_FFFF_FFFF.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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