EP80579 Datasheet, PDF (159/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 5-33. Summary of Local Expansion Bus Error Reporting Capabilities
Feature
Implementation
Enabling and
Masking Error
Reporting
LEB device provides the following registers to support error enabling and masking:
• Errors from LEB: EXP_TIMING_CS[0-7].
The SMIA and SMME registers from the signal target capability in the PCI configuration
header for the LEB also support error masking and enabling.
Logging Details
The SINT register from the signal target capability in the PCI configuration header for the
LEB provides read-only access to the state of the interrupt signals from the LEB.
LEB device captures additional error logging information in the following registers:
• LEB parity errors: EXP_PARITY_STATUS.
Reporting Multiple LEB device reports additional errors as follows:
Errors
• LEB errors
Data Poisoning LEB pass along error information to poison data.
See Section 42.5, “Register Summary”.
5.6.5
IEEE 1588, and GCU
The IEEE 1588 and GCU in the AIOC do not signal any non-functional error conditions.
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August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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