EP80579 Datasheet, PDF (685/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
16.7.1.9
Offset 84h: NSILCAP - NSI Link Capabilities Register
This register indicates NSI specific capabilities.
Table 16-356.Offset 84h: NSILCAP - NSI Link Capabilities Register
Description:
View: PCI
BAR: NSIBAR
Bus:Device:Function: 0:0:0
Offset Start: 84h
Offset End: 87h
Size: 32 bit
Default: 0003A041h
Power Well: Core
Bit Range
31 : 18
17 : 15
14 : 12
11 : 10
Bit Acronym
Bit Description
Sticky
Reserved
L1ELAT
Reserved
ASLPMS
Reserved
L1 Exit Latency: Indicates the length of time this Port
requires to complete the transition from L1 to L0. The
value 010 b indicate more than 64 µs.
Both bytes of this register that contain a portion of this
field must be written simultaneously in order to prevent
an intermediate (and undesired) value from ever
existing.
Reserved
Active State Link PM Support: Reserved
Bit Reset
Value
00h
111b
010b
00b
Bit Access
RWO
09 : 04
03 : 00
MXLW
MXLS
Maximum Link Width: Hardwired to indicate X4.
Maximum Link Speed: Hardwired to indicate 2.5
Gbytes/s.
04h
RO
1h
RO
§§
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
685