EP80579 Datasheet, PDF (525/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 16-139.Bus 0, Device 3, Function 0: Summary of PCI Express Port A1 Standard and
Enhanced PCI Configuration Registers (Sheet 2 of 3)
Offset Start Offset End
Register ID - Description
Default
Value
44h
45h
46h
47h
48h
50h
51h
52h
54h
56h
58h
59h
5Ah
5Ch
60h
64h
65h
66h
68h
6Ch
6Eh
70h
74h
76h
78h
7Ch
7Eh
80h
84h
100h
104h
108h
10Ch
110h
114h
44h
45h
46h
47h
48h
50h
51h
53h
55h
56h
58h
59h
5Bh
5Fh
61h
64h
65h
67h
6Bh
6Dh
6Fh
73h
75h
77h
7Bh
7Dh
7Fh
83h
87h
103h
107h
10Bh
10Fh
113h
117h
“Offset 44h: VSCMD0 - Vendor Specific Command Byte 0 Register” on page 545 00h
“Offset 45h: VSCMD1 - Vendor Specific Command Byte 1 Register” on page 546 00h
“Offset 46h: VSSTS0 - Vendor Specific Status Byte 0 Register” on page 547
00h
“Offset 47h: VSSTS1 - Vendor Specific Status Byte 1 Register” on page 547
00h
“Offset 48h: VSCMD2 - Vendor Specific Command Byte 2 Register” on page 548 00h
“Offset 50h: PMCAPID - Power Management Capabilities Structure Register” on
page 548
01h
“Offset 51h: PMNPTR - Power Management Next Capabilities Pointer Register” on
page 549
58h
“Offset 52h: PMCAPA - Power Management Capabilities Register” on page 549
C822h
“Offset 54h: PMCSR - Power Management Status and Control Register” on
page 550
0000h
“Offset 56h: PMCSRBSE - Power Management Status and Control Bridge
Extensions Register” on page 551
00h
“Offset 58h: MSICAPID - MSI Capabilities Structure Register” on page 551
05h
“Offset 59h: MSINPTR - MSI Next Capabilities Pointer Register” on page 552
64h
“Offset 5Ah: MSICAPA - MSI Capabilities Register” on page 553
0002h
“Offset 5Ch: MSIAR - MSI Address for PCI Express Register” on page 553
FEE00000h
“Offset 60h: MSIDR - MSI Data Register” on page 554
0000h
“Offset 64h: PEACAPID - PCI Express Features Capabilities ID Register” on
page 555
10h
“Offset 65h: PEANPTR - PCI Express Next Capabilities Pointer Register” on
page 556
00h
“Offset 66h: PEACAPA - PCI Express Features Capabilities Register” on page 556 0041h
“Offset 68h: PEADEVCAP - PCI Express Device Capabilities Register” on page 557 00000001h
“Offset 6Ch: PEADEVCTL - PCI Express Device Control Register” on page 558
0000h
“Offset 6Eh: PEADEVSTS - PCI Express Device Status Register” on page 560
0000h
“Offset 70h: PEA1LNKCAP - PCI Express Link Capabilities Register” on page 561 0303E441h
“Offset 74h: PEALNKCTL - PCI Express Link Control Register” on page 562
0001h
“Offset 76h: PEALNKSTS - PCI Express Link Status Register” on page 564
1001h
“Offset 78h: PEA1SLTCAP - PCI Express Slot Capabilities Register” on page 566 00000000h
“Offset 7Ch: PEASLTCTL - PCI Express Slot Control Register” on page 568
01C0h
“Offset 7Eh: PEASLTSTS - PCI Express Slot Status Register” on page 569
0040h
“Offset 80h: PEARPCTL - PCI Express Root Port Control Register” on page 570
00000000h
“Offset 84h: PEARPSTS - PCI Express Root Port Status Register” on page 571
00000000h
“Offset 100h: ENHCAPST - Enhanced Capability Structure Register” on page 571 00010001h
“Offset 104h: UNCERRSTS - Uncorrectable Error Status Register” on page 572
00000000h
“Offset 108h: UNCERRMSK - Uncorrectable Error Mask Register” on page 574
00000000h
“Offset 10Ch: UNCERRSEV - Uncorrectable Error Severity Register” on page 575 00062010h
“Offset 110h: CORERRSTS - Correctable Error Status Register” on page 576
00000000h
“Offset 114h: CORERRMSK - Correctable Error Mask Register” on page 578
00000000h
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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