EP80579 Datasheet, PDF (123/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 3-10. AIOC PCI Device Summary
Device Name
EP80579
Units
B/D/F^b
PCI
BSP^c
Device
ID
SKU ID
Number
Resources^a
GigE MAC 0
GigE MAC 1
GigE MAC 2
MDIO
CAN Interface 0
CAN Interface 1
SSP
IEEE 1588
Local Expansion
Bus
ASU
Reserved
TDM
Reserved
GbE 0 M / 0 / 0 020000h
GbE 1 M / 1 / 0 020000h
GbE 2 M / 2 / 0 020000h
MDIO M / 3 / 0 FF0000h
CAN 0 M / 4 / 0 0C0900h
CAN 1 M / 5 / 0 0C0900h
SSP
M / 6 / 0 078000h
1588 M / 7 / 0 111000h
LE Bus M / 8 / 0 068000h
ASU
M / 9 / 0 0B4000h
Reserved
TDM
Reserved
M / 10 /
0
088000h
M / 11 /
0
0B4000h
M / 12 /
0
110100h
5040h
5041h
5042h
5043h
5044h
5045h
5046h
5047h
5048h
5049h
504Ah
504Bh
503Eh
5039h
503Ah
503Bh
503Ch
503Dh
502Ch
502Dh
502Eh
502Fh
503Fh
504Ch
5030h
2,4,6,8
1,3,7,5
Reserved^d
Reserved^d
PM, MSI, ST, MBAR (128KB),
IOBAR (32B)
2,4,6,8
1,3,7,5
Reserved^d
Reserved^d
PM, MSI, ST, MBAR (128KB),
IOBAR (32B)
2,4,6,8
1,3,7,5
Reserved^d
Reserved^d
PM, MSI, ST, MBAR (128KB),
IOBAR (32B)
1,2,3,4,5,6,7
,8
PM, MBAR (4KB)
1,2,3,4,5,6,7
,8
PM, MSI, ST, MBAR (4KB)
1,2,3,4,5,6,7
,8
PM, MSI, ST, MBAR (4KB)
1,2,3,4,5,6,7
,8
PM, MSI, ST, MBAR (4KB)
1,2,3,4,5,6,7
,8
PM, MSI, ST, MBAR (4KB)
1,2,3,4,5,6,7 PM, MSI, ST, MBAR (4KB and
,8
0-256MB^e)
2,4,6,8
1,3,7,5
Reserved^d
Reserved^d
PM, MSI, ST, MBAR (8KB,
16KB, 16KB, and 4KB)
1,2,3,4,5,6,7
,8
Reserved
1,3,5,7
PM, MSI, ST, MBAR (4KB and
4KB)
1,2,3,4,5,6,7
,8
Reserved
a. “MBAR” is a memory space BAR, “IOBAR” is an I/O space BAR, “PM” is a power management capability, “MSI”
is an MSI capability, and “ST” is an EP80579 signal target capability.
b. PCI bus number, device number, and function number.
c. PCI base class code, subclass code, and programming interface PCI configuration register values.
d. These device IDs are reserved for future SKUs.
e. The size of the region that the 0-256MB MBAR requests is a multiple of 32MB between 0MB and 256MB
(inclusive) based on reset-time platform configuration.
A summary of the registers, memory-mapped, and I/O-mapped resources that
Table 3-9 and Table 3-10 identify can be found in Section 7.0, “Register Summary”.
Detailed descriptions of these resources can be found in the chapters that cover the
relevant block.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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