EP80579 Datasheet, PDF (238/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 7-55. Bus M, Devices 2, Function 0: Summary of Gigabit Ethernet Interface
Registers Mapped Through CSRBAR Memory BAR (Sheet 3 of 4)
Offset Start Offset End
Register ID - Description
Default
Value
401Ch
4020h
4028h
4030h
4034h
403Ch
4040h
4048h
404Ch
4050h
4054h
4058h
405Ch
4060h
4064h
4068h
406Ch
4070h
4074h
4078h
407Ch
4080h
4088h
408Ch
4090h
4094h
40A0h
40A4h
40A8h
40ACh
40B0h
40C0h
40C4h
40C8h
40CCh
40D0h
40D4h
40D8h
401Fh
4023h
402Bh
4033h
4037h
403Fh
4043h
404Bh
404Fh
4053h
4057h
405Bh
405Fh
4063h
4067h
406Bh
406Fh
4073h
4077h
407Bh
407Fh
4083h
408Ah
408Fh
4093h
4097h
40A3h
40A7h
40ABh
40AFh
40B3h
40C3h
40C7h
40CFh
40CFh
40D3h
40D7h
40DBh
“MCC: Multiple Collision Count Register” on page 1508
00000000h
“LATECOL: Late Collisions Count Register” on page 1509
00000000h
“COLC: Collision Count Register” on page 1509
00000000h
“DC: Defer Count Register” on page 1510
00000000h
“TNCRS: Transmit with No CRS Count Register” on page 1510
00000000h
“CEXTERR: Carrier Extension Error Count Register” on page 1511
00000000h
“RLEC: Receive Length Error Count Register” on page 1511
00000000h
“XONRXC: XON Received Count Register” on page 1512
00000000h
“XONTXC: XON Transmitted Count Register” on page 1512
00000000h
“XOFFRXC: XOFF Received Count Register” on page 1513
00000000h
“XOFFTXC: XOFF Transmitted Count Register” on page 1513
00000000h
“FCRUC: FC Received Unsupported Count Register” on page 1514
00000000h
“PRC64: Good Packets Received Count (64 Bytes) Register” on page 1514
00000000h
“PRC127: Good Packets Received Count (65-127 Bytes) Register” on page 1515 00000000h
“PRC255: Good Packets Received Count (128-255 Bytes) Register” on page 1515 00000000h
“PRC511 - Good Packets Received Count (256-511 Bytes) Register” on page 1516 00000000h
“PRC1023: Good Packets Received Count (512-1023 Bytes) Register” on
page 1516
00000000h
“PRC1522: Good Packets Received Count (1024 to Max Bytes) Register” on
page 1517
00000000h
“GPRC: Good Packets Received Count (Total) Register” on page 1518
00000000h
“BPRC: Broadcast Packets Received Count Register” on page 1518
00000000h
“MPRC: Multicast Packets Received Count Register” on page 1519
00000000h
“GPTC: Good Packets Transmitted Count Register” on page 1519
00000000h
“GORCL: Good Octets Received Count Low Register” on page 1520
00000000h
“GORCH: Good Octets Received Count High Register” on page 1521
00000000h
“GOTCL: Good Octets Transmitted Count Low Register” on page 1522
00000000h
“GOTCH: Good Octets Transmitted Count High Register” on page 1522
00000000h
“RNBC: Receive No Buffers Count Register” on page 1523
00000000h
“RUC: Receive Undersize Count Register” on page 1523
00000000h
“RFC: Receive Fragment Count Register” on page 1524
00000000h
“ROC: Receive Oversize Count Register” on page 1524
00000000h
“RJC: Receive Jabber Count Register” on page 1525
00000000h
“TORL: Total Octets Received Low Register” on page 1526
00000000h
“TORH: Total Octets Received High Register” on page 1526
00000000h
“TOTL: Total Octets Transmitted Low Register” on page 1527
00000000h
“TOTH: Total Octets Transmitted High Register” on page 1528
00000000h
“TPR: Total Packets Received Register” on page 1528
00000000h
“TPT: Total Packets Transmitted Register” on page 1529
00000000h
“PTC64 - Packets Transmitted Count (64 Bytes) Register” on page 1529
00000000h
Intel^® EP80579 Integrated Processor Product Line Datasheet
238
August 2009
Order Number: 320066-003US