EP80579 Datasheet, PDF (1896/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
49.5.15.3 LEB AC Characteristics
49.5.15.3.1 Local Expansion Bus Synchronous Operation
Figure 49-44.Local Expansion Bus Synchronous Timing
EX_CLK
EX_DATA_BE#, PARITY -
output_signals
EX_control signals –
output_signals
EX_DATA_BE#, PARITY -
input_signals
EX_control signals –
input_signals
T1
T2
T3 T4
T5 T6
B6578-01
Table 49-91. Local Expansion Bus Synchronous Operation Timing Values
Symbol
Parameter
33 MHz
Min Max
66 MHz
Min Max
80 MHz
Min Max
Units Notes
T₁
Valid rising edge of EX_CLK to valid signal on the
output.
8.5
8.0
7.5
ns
1
T₂
Valid signal hold time after the rising edge of
EX_CLK
1
1
1
ns
1, 4
T₃
Valid data signal on an input prior to the rising edge
of EX_CLK
2.5
2.5
2.5
ns
1
T₄
Required hold time of a data input after the rising
edge of EX_CLK
0.5
0.5
0.5
ns
1, 4
T₅
Valid control signal on an input prior to the rising
edge of EX_CLK
3.5
3.5
3.5
ns
1
T₆
Required hold time of a control input after the rising
edge of EX_CLK
0.5
0.5
0.5
ns
1, 4
CLoad Load Capacitance
5
60
5
50
5
40
pF
4
Notes:
1.
Drive settings do not apply to EX_CS# signals and are expected to be point to point.
2.
EX_control_signals output signals consist of EX_ALE, EX_ADDR, EX_CS#, EX_RD#, EX_WR#, EX_WAIT#
3.
EX_control_signals input signals consist of EX_ADDR, EX_CS#, EX_BURST, EX_RD#, EX_WR#
4.
Guaranteed by design. These values are typical values seen for this process, but not measured during production
testing.
Intel^® EP80579 Integrated Processor Product Line Datasheet
1896
August 2009
Order Number: 320066-003US