EP80579 Datasheet, PDF (713/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
18.0
18.1
System Management
Overview
The CMI provides various functions to make a system easier to manage and lower the
Total Cost of Ownership (TCO) of the system. Features and functions can be augmented
via external A/D converters and GPIO, as well as an external microcontroller.
The following features and functions are supported by CMI:
• First timer to generate SMI# after programmable time.
— First timeout causes SMI#; allows for SMM-based recovery from operating
system lockup.
— Operating system-based software agent accesses CMI to periodically reload
timer.
• Ability for SMM handler to generate “TCO” interrupt to operating system.
— Allows for operating system-based code augmentation.
• Ability for operating system to generate SMI#.
— Call-back from operating system to TCO code in SMM handler.
• Second hard coded timeout to generate reboot.
— Used only after first timeout occurs.
— Second timeout allows for automatic system reset and reboot if hardware error
detected. Various system states are preserved via this special reset to allow for
possible error detection and correction.
— Reset associated with reboot may attempt to preserve some registers for
diagnostic purposes.
— SMI# handler must reload the main timer within 2.4 s to prevent the second
timer from causing a reboot (timeout during SMI is assumed as broken CPU or
stuck hardware).
— Option to prevent reset if second timeout occurs.
• Processor present detection.
— Detects if processor fails to fetch the first instruction after reset.
— If CPU failure detected, option to pulse a GPIO or send SMBus message. The
SMBus message can be used to indicate to an External LAN controller to send a
distress message. The GPIO can control an LED with optional blink.
• Ability to handle various errors (such as ECC errors) indicated by the IMCH.
— Can generate SMI# or TCO interrupt.
• Intruder detect input.
— Can generate TCO interrupt or SMI# when the system cover is removed.
• Ability for TCO messages to coexist with standard SMBus devices.
• Detection of bad FWH programming.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
713