EP80579 Datasheet, PDF (922/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 24-37. Read Byte/Word Protocol with PEC
28 Read
29 Acknowledge from slave
30 – 37 Data from slave - 8 bits
38 Acknowledge
39 – 46 PEC from slave
47 NOT acknowledge
48 Stop
28 Read
29 Acknowledge from slave
30 – 37 Data Byte Low from slave - 8 bits
38 Acknowledge
39 – 46 Data Byte High from slave - 8 bits
47 Acknowledge
48 – 55 PEC from slave
56 NOT acknowledge
57 Stop
24.4.2.5
Note:
Process Call
The process call is named because a command sends data and waits for the slave to
return a value dependent on that data. The protocol is simply a write word followed by
a read word, but without a second command or stop condition.
When programmed for the process call command, the CMI transmits the transmit
address, device command, and DATA0 and DATA1 registers. Data received from the
device is stored in the DATA0 and DATA1 registers. The value written into bit 0 of the
Transmit Slave Address Register (SMBus Offset 04h) needs to programmed to 0.
If the I2C_EN bit is set, then the command field is not sent.
The order sent with PEC disabled is shown in Table 24-38. The process call command
with I2C_EN set and either the PEC_EN or AAC bit set produces undefined results.
Software must either force the I2C_EN bit or both PEC_EN and AAC bits to 0 when
running this command.
Table 24-38. Process Call Protocol without PEC
Bit
Description
1
2–8
9
10
Start
Slave Address - 7 bits
Write
Acknowledge from Slave
11 – 18 Command code - 8 bits (Skip if I2C_EN is set)
19 Acknowledge from slave (Skip if I2C_EN is set)
20 – 27 Data byte Low - 8 bits
28 Acknowledge from Slave
29 – 36 Data Byte High - 8 bits
37 Acknowledge from slave
38 Repeated Start
39 – 45 Slave Address - 7 bits
46 Read
47 Acknowledge from slave
48 – 55 Data Byte Low from slave - 8 bits
56 Acknowledge
Intel^® EP80579 Integrated Processor Product Line Datasheet
922
August 2009
Order Number: 320066-003US